Sebastien Bourdeauducq
|
e96b027dee
|
Framebuffer mixing
|
2013-05-10 21:03:55 +02:00 |
Sebastien Bourdeauducq
|
955a9733c8
|
Revert "genlib/record/connect: add match_by_position"
This reverts commit df1ed32765 .
|
2013-05-10 17:41:51 +02:00 |
Sebastien Bourdeauducq
|
3ab83fb693
|
framebuffer: reorganize in preparation for mixer
|
2013-05-09 19:23:22 +02:00 |
Sebastien Bourdeauducq
|
6f11ddb079
|
software/dvisampler: periodically reset PLL until locked + recalibrate IO every second
|
2013-05-09 14:11:08 +02:00 |
Sebastien Bourdeauducq
|
546aa76aef
|
software/dvimixer: support two channels
|
2013-05-09 13:41:21 +02:00 |
Sebastien Bourdeauducq
|
06064d33aa
|
dvisampler/dma: better 8:8:8 -> 10:10:10 conversion
|
2013-05-09 11:27:24 +02:00 |
Sebastien Bourdeauducq
|
c6d553e4e4
|
software/videomixer: interrupt-driven video passthrough
|
2013-05-09 10:52:43 +02:00 |
Sebastien Bourdeauducq
|
fe87221d2b
|
dvisampler/dma: reverse slot allocation order
|
2013-05-09 10:51:50 +02:00 |
Sebastien Bourdeauducq
|
2df4ff0ad9
|
dvisampler/dma: fix interrupt generation
|
2013-05-09 10:51:34 +02:00 |
Sebastien Bourdeauducq
|
d685ed21fc
|
dvisampler/dma: bugfixes
|
2013-05-08 22:50:40 +02:00 |
Sebastien Bourdeauducq
|
66b4bae7c8
|
top: connect dvisampler DMA IRQs
|
2013-05-08 22:31:42 +02:00 |
Sebastien Bourdeauducq
|
b3d87e1c79
|
software/videomixer: use new DMA engine
|
2013-05-08 22:31:18 +02:00 |
Sebastien Bourdeauducq
|
29efa85dec
|
dvisampler: new DMA engine (buggy)
|
2013-05-08 22:31:01 +02:00 |
Sebastien Bourdeauducq
|
c82b53f1cd
|
bank/description/AutoCSR: add autocsr_exclude
|
2013-05-08 20:58:57 +02:00 |
Sebastien Bourdeauducq
|
89dbc37ece
|
cif: do not generate write function for CSRStatus
|
2013-05-08 20:58:27 +02:00 |
Sebastien Bourdeauducq
|
10212e85e7
|
dma_asmi: cleanup
|
2013-05-08 18:58:50 +02:00 |
Sebastien Bourdeauducq
|
b9b6df6f29
|
bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source
|
2013-05-08 18:12:26 +02:00 |
Sebastien Bourdeauducq
|
8e76c960d9
|
timer, uart: EventSourceLevel -> EventSourceProcess
|
2013-05-08 18:11:42 +02:00 |
Sebastien Bourdeauducq
|
7a2f31b2e8
|
platforms/papilio_pro: no reset signal by default
|
2013-05-07 19:10:18 +02:00 |
Sebastien Bourdeauducq
|
439f032921
|
crg: support for resetless system clock domain
|
2013-05-07 19:09:56 +02:00 |
Florent Kermarrec
|
6a4c194aab
|
platforms: add KC705
|
2013-05-07 10:31:12 +02:00 |
Brandon Hamilton
|
3d0894465c
|
mibuild: Add platform for Xilinx ML605 board
|
2013-05-06 14:21:56 +02:00 |
Sebastien Bourdeauducq
|
e4b0e8ed6d
|
xilinx_ise: enable register balancing
|
2013-05-06 14:21:39 +02:00 |
Sebastien Bourdeauducq
|
e2d15b169a
|
dvisampler: mostly working, very basic and slightly buggy DMA
|
2013-05-06 09:58:12 +02:00 |
Sebastien Bourdeauducq
|
f82a16f3a3
|
software/videomixer: send to framebuffer
|
2013-05-06 09:56:49 +02:00 |
Sebastien Bourdeauducq
|
679d13c99c
|
another attempt at fixing clock routing issues
|
2013-05-06 09:56:10 +02:00 |
Sebastien Bourdeauducq
|
784e96bb87
|
build.py: LOC clock generator components to limit breakage of the ISE shitware
|
2013-05-05 23:07:15 +02:00 |
Sebastien Bourdeauducq
|
11cbdf0d4f
|
build.py: support single DVI sampler
|
2013-05-05 20:56:58 +02:00 |
Sebastien Bourdeauducq
|
d05f3d22e0
|
chansync: bugfix
|
2013-05-05 15:07:57 +02:00 |
Sebastien Bourdeauducq
|
9c0d13b615
|
tb: add chansync
|
2013-05-05 15:07:36 +02:00 |
Sebastien Bourdeauducq
|
d175e01876
|
dvisampler: connect sync polarity detection
|
2013-05-05 12:58:53 +02:00 |
Sebastien Bourdeauducq
|
cb008a061c
|
dvisampler/chansync: fix FIFO width
|
2013-05-05 12:58:24 +02:00 |
Sebastien Bourdeauducq
|
ad01dc8a74
|
software/videomixer: use new resdetection regs
|
2013-05-05 11:58:43 +02:00 |
Sebastien Bourdeauducq
|
ea20b74ed1
|
dvisampler/resdetection: use DE instead of hsync
|
2013-05-05 11:54:36 +02:00 |
Sebastien Bourdeauducq
|
e3e1dcd547
|
dvisampler: add sync polarity detection module (thanks Lars for suggestions)
|
2013-05-05 11:53:38 +02:00 |
Sebastien Bourdeauducq
|
71e3bba228
|
dvisampler/decoding: hold C when DE=1
|
2013-05-05 11:51:48 +02:00 |
Sebastien Bourdeauducq
|
4259699d78
|
dvisampler: add RawDVISampler
|
2013-05-04 20:40:21 +02:00 |
Sebastien Bourdeauducq
|
63073319b0
|
dvisampler/datacapture: swap bit pairs
|
2013-05-04 20:38:50 +02:00 |
Sebastien Bourdeauducq
|
7a74dae461
|
actorlib/spi: add DMAWriteController
|
2013-05-04 17:38:54 +02:00 |
Sebastien Bourdeauducq
|
fd089b146f
|
actorlib/dma_asmi/OOOWriter: fix tag offset
|
2013-05-04 17:38:17 +02:00 |
Sebastien Bourdeauducq
|
53e5c4f59c
|
build: only add UCF constraints for the cores that are present
|
2013-05-02 23:56:09 +02:00 |
Sebastien Bourdeauducq
|
12deaa91d8
|
flow/network/DataFlowGraph: add_buffered_connection
|
2013-05-02 13:25:30 +02:00 |
Sebastien Bourdeauducq
|
b5b29f6d5d
|
bank/description/CSRStorage: set reset property of storage for use in test benches
|
2013-05-02 11:49:23 +02:00 |
Sebastien Bourdeauducq
|
8ffa273719
|
flow/network: better determination of plumbing layout
|
2013-05-01 22:13:26 +02:00 |
Sebastien Bourdeauducq
|
471393d0f9
|
actorlib/dma_asmi: drive dat_wm
|
2013-05-01 21:52:26 +02:00 |
Sebastien Bourdeauducq
|
26c0261a4e
|
Remove unneeded file
|
2013-05-01 17:13:40 +02:00 |
Sebastien Bourdeauducq
|
2e3c2611a6
|
software: put network code in a library
|
2013-05-01 00:12:13 +02:00 |
Sebastien Bourdeauducq
|
8222ee7f46
|
framebuffer: use DMA controller from Migen
|
2013-04-30 18:55:35 +02:00 |
Sebastien Bourdeauducq
|
c8810a016f
|
actorlib/spi: add DMA read controller
|
2013-04-30 18:55:01 +02:00 |
Sebastien Bourdeauducq
|
c70c71502e
|
actorlib/spi/SingleGenerator: use CSR alignment bits
|
2013-04-30 18:54:47 +02:00 |