776579f0d7
fhdl/structure: all case statements should be lists
2015-09-17 17:22:24 +08:00
c2109f8f81
minor bugfixes
2015-09-17 15:20:27 +08:00
9dd3200ba2
fhdl/structure: fix namespace pollution
2015-09-17 14:39:17 +08:00
e940c6d9b9
fhdl/structure: introduce Constant, autowrap for eq/ops, fix Signal as dictionary key problem
2015-09-15 12:38:02 +08:00
714ae43ab8
fhdl: remove features new simulator won't use
2015-09-10 18:29:57 -07:00
f32f9be17a
resetless -> reset_less
2015-07-27 11:46:11 +08:00
cc6877df9e
fhdl: allow use of ResetSignal() on resetless clock domains
2015-07-27 01:51:52 +08:00
f97d7ff44c
global: pep8 (E261, E271)
2015-04-13 21:21:30 +02:00
1051878f4c
global: pep8 (E302)
2015-04-13 20:45:35 +02:00
17e5249be0
global: pep8 (replace tabs with spaces)
2015-04-13 20:07:07 +02:00
286092b62e
Raise exception when not using correct boolean operators
2014-10-27 19:40:22 +08:00
dbaeaf7833
remove trailing whitespaces
2014-10-17 17:08:46 +08:00
bd232f3f61
fhdl.structure: do not permit clock domain names that start with numbers
2014-08-18 11:01:56 +08:00
ac2e961618
fhdl.structure: remove unused imports
2014-08-18 11:01:56 +08:00
6036fffef2
Signal.__getitem__: raise TypeError and IndexError when appropriate
2014-08-18 11:01:56 +08:00
b3d69913cd
Signal.like: pass kwargs
2014-08-18 11:01:56 +08:00
44c6e524ba
migen.fhdl.structure: add Signal.like(other)
...
This is a convenience method. Signal(flen(other)) is used frequently but that
drops the signedness. Signal((other.nbits, other.signed)) would be correct but
is long.
2014-07-24 23:52:59 -06:00
29ed3918cc
fhdl: forbid zero-length signals
2014-04-18 15:01:50 +02:00
63c1d7e4b7
New simulation API
2014-01-26 22:19:43 +01:00
8d3d61ba98
fhdl.size: rename to bitcontainer
2013-12-03 22:51:52 +01:00
c71eb5778f
migen.fhdl.structure: have Cat() flat_iteration-ize its arguments
2013-12-03 21:36:33 +01:00
be9fea182d
fhdl/structure: clarify usage restrictions of LHS Cat
2013-11-29 22:35:53 +01:00
73db4944f1
fhdl.structure: document the API
2013-11-29 22:31:55 +01:00
6f9f08f6eb
add ternary operator sel ? a : b
2013-08-12 13:15:56 +02:00
e12187aa80
add += operator to fragment
2013-08-12 13:15:05 +02:00
fdf022a04b
fhdl: improve naming of related signals
2013-08-08 19:22:17 +02:00
305c6985bc
fhdl: support for naming related signals
2013-08-08 11:32:37 +02:00
b7ed19c6c5
fhdl: do not export Fragment
2013-07-25 18:52:54 +02:00
04efee7847
fhdl: mark variable as deprecated
2013-06-30 20:14:20 +02:00
a255296171
support re-slicing and non-unit step size
...
* support slicing of Slice/Cat/Replicate through lowering
* support non-unit step size slices through unpacking and Cat()
2013-06-30 14:03:34 +02:00
70ffe86356
New migen.fhdl.std to simplify imports + len->flen
2013-05-22 17:11:09 +02:00
f599fe4ade
Support for resetless clock domains
2013-04-23 11:54:05 +02:00
ea63389823
fhdl: support len() on all values
2013-04-14 13:50:26 +02:00
7a06e9457c
Lowering of Special expressions + support ClockSignal/ResetSignal
2013-03-18 18:36:50 +01:00
b6fe3ace05
fhdl/structure: style fix
2013-03-17 15:33:38 +01:00
2a4cc3875c
Merge pull request #6 from larsclausen/master
...
Minor improvements
2013-03-17 07:33:14 -07:00
dd0f3311cd
structure: remove Fragment.call_sim
2013-03-15 19:15:48 +01:00
bd8bbd9305
Make ClockDomains part of fragments
2013-03-15 18:17:33 +01:00
72579a6129
Add support for negative slice indices
...
In python a negative indices usually mean start counting from the right side.
I.e. if the index is negative is acutal index used is len(l) + i. E.g. l[-2]
equals l[len(l)-2].
Being able to specify an index this way also comes in handy for migen slices in
some cases. E.g. the following snippet can be implement to shift an abitrary
length register n bits to the right:
reg.eq(Cat(Replicate(0, n), reg[-n:])
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2013-03-12 21:56:01 +01:00
17e0dfe120
fhdl/module: replace autofragment
2013-03-10 19:27:55 +01:00
2b8dc52c13
Use common definition for FinalizeError
2013-03-09 19:03:13 +01:00
49cfba50fa
New 'specials' API
2013-02-22 17:56:35 +01:00
1b18194b1d
fhdl: TSTriple
2013-02-19 17:26:02 +01:00
dc93a231c6
fhdl: tristate support
2013-02-15 00:17:24 +01:00
473fd20f8c
fhdl/structure: store clock domain name
2013-01-24 13:49:49 +01:00
3fae6c8f03
Do not use super()
2012-12-18 14:54:33 +01:00
483b821342
fhdl/structure: do not create Signal in Instance when parameter is int
2012-12-06 20:56:46 +01:00
55d143a454
fhdl/structure: add unary minus
2012-11-29 22:52:57 +01:00
50ed73c937
New specification for width and signedness
2012-11-29 21:22:38 +01:00
6eebfce44a
Refactor Case
2012-11-29 01:11:15 +01:00
Sebastien Bourdeauducq
Florent Kermarrec
Yann Sionneau
Robert Jordens
Sebastien Bourdeauducq
Nina Engelhardt
Lars-Peter Clausen