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124 Commits 42 Branches 14 Tags 30 MiB
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50 Commits

Author SHA1 Message Date
Florent Kermarrec 111f527647 do some clean up 2014-09-24 22:26:33 +02:00
Florent Kermarrec 2fb418a373 use new MiSoC UART with phase accumulators 
this will allow to speed up MiLa reads
 2014-09-24 21:56:15 +02:00
Florent Kermarrec 452a4a76f3 use verilog namespace to export mila configuration 2014-08-03 17:09:01 +02:00
Florent Kermarrec 6ffed70b59 uart2wishbone: disconnect rx line from shared pads when bridge is selected 
(avoid CPU crash when we communicate with the bridge)
 2014-08-03 13:15:56 +02:00
Florent Kermarrec f4e6cebab2 clean up 2014-08-03 11:44:27 +02:00
Florent Kermarrec cd51e78f54 storage: use SyncFIFOBuffered to implement fifo in block ram 2014-08-02 19:12:03 +02:00
Florent Kermarrec 47a85cc1ad use new MiSoC fifo (no flush signal) 2014-08-01 10:36:15 +02:00
Florent Kermarrec a0df5baa55 host: add support for various csr_data width (8 & 32 tested, but should work with others) 2014-06-26 13:22:21 +02:00
Florent Kermarrec 0f9bc5ad6e fix bit inversion on CSV/PY exports 2014-06-21 19:06:47 +02:00
Florent Kermarrec 074a12b444 create dump class and specific export functions, add python dictionnary export 2014-06-19 13:24:47 +02:00
Florent Kermarrec a737358919 host: split read/export and add csv export 2014-06-17 11:25:10 +02:00
Florent Kermarrec 8719206a3a uart2wishbone: add default baudrate 2014-06-05 15:13:20 +02:00
Florent Kermarrec b94cba2d4b mila: add input pipe to ease timing 2014-05-24 09:23:16 +02:00
Florent Kermarrec 31e142fd88 drivers: clean up / fixes 2014-05-22 18:33:28 +02:00
Florent Kermarrec 9a059336bf storage: simplify run length encoder... 2014-05-22 18:13:27 +02:00
Florent Kermarrec 0bc1cd6f77 fix uart selection when opening wishbone 2014-05-22 16:11:32 +02:00
Florent Kermarrec 1a07116ab1 change export format and simplify usage 2014-05-20 13:16:24 +02:00
Florent Kermarrec ba0382ad92 move some functions in drivers and export layout in csv 2014-05-20 11:36:10 +02:00
Florent Kermarrec 2312127c1f simplify and clean up 2014-05-20 09:56:35 +02:00
Florent Kermarrec 6f47a928b1 storage: simplify recorder... 2014-05-13 21:30:32 +02:00
Florent Kermarrec 171224329e drivers: add genericity & prog_range_detector, prog_edge_detector methods 2014-04-21 00:17:23 +02:00
Florent Kermarrec 7a489b3135 refactor code 2014-04-20 23:53:33 +02:00
Florent Kermarrec b766af0d99 uart2csr: add pads parameter 2013-09-25 15:07:23 +02:00
Florent Kermarrec 69009c8405 mila: test rle 2013-09-22 21:23:51 +02:00
Florent Kermarrec a880862628 mila: symplify usage 2013-09-22 13:28:12 +02:00
Florent Kermarrec 27f26dac03 use custom Records instead of Sink/Source (semms easier, but will be reverted if not) 2013-09-22 13:14:11 +02:00
Florent Kermarrec 39f1f2146f storage: add run length encoder 2013-09-22 12:35:46 +02:00
Florent Kermarrec 4fd6619171 trigger: add range_detector / edge_detector 2013-09-22 12:15:11 +02:00
Florent Kermarrec 980a83a74c move trigger/recorder 2013-09-22 11:46:02 +02:00
Florent Kermarrec 452d266b14 com: add lm32 uart2wb bridge 2013-09-22 11:36:13 +02:00
Florent Kermarrec 8f35ed11b5 clean up/ simplify 2013-09-22 11:35:02 +02:00
Florent Kermarrec ce9bff21e9 refactoring 2013-09-22 02:49:59 +02:00
Florent Kermarrec 89a8d8daf3 use new migen API 2013-06-16 13:12:57 +02:00
Florent Kermarrec 5c298f406c simplify signals connexion 2013-06-02 15:15:47 +02:00
Florent Kermarrec 48c1a902e5 adapt to new CSR API 2013-04-14 18:23:37 +02:00
Florent Kermarrec 4281a18deb add stb signal 2013-04-02 21:13:21 +02:00
Florent Kermarrec e5bf5f42d6 adapt to mibuild & migen changes 2013-03-26 22:24:29 +01:00
Florent Kermarrec 492a5acfe3 add Run Length Encoding 2013-03-23 22:06:08 +01:00
Florent Kermarrec 88748bd74f simplify recorder 2013-03-23 12:26:22 +01:00
Florent Kermarrec 99a78b8e33 clean up 2013-03-22 14:01:38 +01:00
Florent Kermarrec 5e48f9c005 update driver api 2013-03-22 12:35:12 +01:00
Florent Kermarrec b1cbfe2326 clean up/fixes 2013-03-22 11:31:21 +01:00
Florent Kermarrec db1ceccca1 fix uart2Csr and update miio example 2013-03-21 12:18:04 +01:00
Florent Kermarrec 24211574ec update de0nano example/ remove de1 (wip) 2013-03-18 23:03:52 +01:00
Florent Kermarrec 36f3556028 Add uart2csr 2013-03-18 21:45:07 +01:00
Florent Kermarrec 60e2cdfe79 get_registers --> get_registers_glue since it's conflicting with new Migen register automatic detection 2013-03-11 20:05:30 +01:00
Florent Kermarrec edce543b14 adapt to migen changes 2013-03-01 01:09:00 +01:00
Florent Kermarrec 58edd7632c compiles but untested 2013-02-28 00:32:42 +01:00
Florent Kermarrec 5fc89f0c71 move spi2csr to briges/spi2csr 2013-02-26 23:17:34 +01:00
Florent Kermarrec e95e8b03b7 - reworking WIP 2013-02-22 16:40:49 +01:00