4a3a1d02e9
modularize SoC integration
2013-11-24 10:30:02 +01:00
4c50923cdf
use new lasmibus.Crossbar master API
2013-11-23 17:51:41 +01:00
2160636a5e
update pointers
2013-11-23 11:29:20 +01:00
7496ba6360
framebuffer: fix resynchronization after resolution change
2013-11-21 00:33:22 +01:00
f5ba0ac023
videomixer: select 1024x768 by default
2013-11-21 00:33:01 +01:00
96fcb3574e
Revert "framebuffer: reset VTG"
...
This reverts commit 6cb18f5ce3
2013-11-19 23:48:00 +01:00
2eabf97147
dvisampler: transfer the last word in frames correctly
2013-11-19 23:38:48 +01:00
f62615054d
videomixer: stick to 20x PLL configuration as 10x causes traditional spartan6 weirdness
2013-11-18 20:43:30 +01:00
a75be2e5dd
videomixer: reconfigure PLL on resolution change
2013-11-18 20:37:45 +01:00
72001addcb
videomixer: add PLL dump command
2013-11-18 20:37:27 +01:00
6fc03946be
videomixer: add PLL control code
2013-11-18 20:37:10 +01:00
8b82575861
dvisampler: hold PLL in reset when disabled
2013-11-18 20:36:30 +01:00
de76e91147
framebuffer: expose PLL DRP to CSR
2013-11-18 20:32:33 +01:00
9e883b8b02
dvisampler: expose PLL DRP to CSR
2013-11-18 20:32:21 +01:00
4cfcda6c8c
framebuffer: unpack memory words in pixel clock domain for better perf
2013-11-17 23:41:18 +01:00
8f164d0d7b
videomixer: reduce debug output
2013-11-17 23:40:42 +01:00
64bfca56b4
videomixer: add more video modes
2013-11-16 17:41:03 +01:00
ba15f1581f
videomixer: flush L2 after CPU framebuffer write
2013-11-16 16:27:58 +01:00
c9e99dfca9
bios: flushl2 command
2013-11-16 16:27:34 +01:00
c3d0985fb2
add L2 cache size in identifier + function to flush L2
2013-11-16 16:27:21 +01:00
940341b4bf
videomixer: fix stray DMA detection
2013-11-16 13:53:38 +01:00
6f990a017e
dvisampler: pack pixels in pixel clock domain to improve performance
2013-11-16 13:53:26 +01:00
d225bdf362
videomixer: clear framebuffers
2013-11-15 11:25:58 +01:00
6cb18f5ce3
framebuffer: reset VTG
2013-11-15 11:25:07 +01:00
a5d9f72901
videomixer: check resolution and frame length
2013-11-13 18:57:39 +01:00
34e8e8c259
dvisampler: update address CSR at end of DMA
2013-11-13 18:57:10 +01:00
1582bad2d6
videomixer: filter PLL lock output
2013-11-13 16:50:09 +01:00
1a28690fa0
microudp: fix udp txlen
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* the preample length 8 is already included in sizeof(struct
ethernet_header)
* the minimum packet size is 64, exluding fcs and including
preample it is 68 (the arp functions are correct)
2013-11-12 19:05:15 +01:00
69568adb8e
videomixer: support resolution change at runtime
2013-11-11 23:20:21 +01:00
593867b92a
videomixer: add more video modes
2013-11-11 22:16:56 +01:00
c8da400af0
videomixer: compute best m/d value for pixel clock synthesizer
2013-11-11 21:30:12 +01:00
132b6ce87d
videomixer: set established timing bits in EDID
2013-11-11 18:56:13 +01:00
3ba9fbefd5
videomixer: generate EDID
2013-11-11 17:52:07 +01:00
15499560b5
cpuif: add memories to csr.h
2013-11-11 16:53:00 +01:00
f5211aff30
videomixer: add EDID manipulation routines
2013-11-10 23:50:18 +01:00
75d25af3aa
cosmetic changes
2013-11-10 16:12:24 +01:00
de87149c8c
common.mak: drop the echo from the version tag finding, did not work here, use python -c
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Signed-off-by: Robert Jordens <jordens@gmail.com>
2013-11-10 13:17:37 +01:00
31ec33dbad
s6ddrphy: use shorter Instance argument notation
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Signed-off-by: Robert Jordens <jordens@gmail.com>
2013-11-10 12:52:03 +01:00
e4db7d1c7f
common.mak: specify python3
2013-11-10 11:29:27 +01:00
c1e5683ba2
s6ddrphy: drop unused outputs, shortens verilog and produces more readable warnings
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Signed-off-by: Robert Jordens <jordens@gmail.com>
2013-11-10 11:13:36 +01:00
4fc301ceba
common.mak: -Os instead of -O3, smaller bios (<32k)
2013-11-10 10:51:05 +01:00
05944cf909
cpuif.py: add _ADDR and _SIZE defines for each register
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Signed-off-by: Robert Jordens <jordens@gmail.com>
2013-11-10 10:44:39 +01:00
5c5e62cc0d
top: set platform ID
2013-11-09 18:34:36 +01:00
d7a4d8b66e
use git commit id as version
2013-11-09 16:38:44 +01:00
0b881d934f
rename milkymist-ng to MiSoC
2013-11-09 15:27:32 +01:00
307fb41ca3
s6ddrphy: improve genericity by adding wr_bitslip and dqs_ddr_alignment parameters bitslip parameter is renamed to rd_bitslip
2013-11-09 00:59:11 +01:00
e7c72a826c
uart_isr: fix interrupts clear
2013-10-23 13:04:49 +02:00
833d7c7eec
add CSV CSR map output
2013-10-21 00:04:26 +02:00
b766af0d99
uart2csr: add pads parameter
2013-09-25 15:07:23 +02:00
69009c8405
mila: test rle
2013-09-22 21:23:51 +02:00
Sebastien Bourdeauducq
Robert Jordens
Florent Kermarrec