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868 Commits 40 Branches 14 Tags 51 MiB
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868 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq c82b53f1cd bank/description/AutoCSR: add autocsr_exclude 2013-05-08 20:58:57 +02:00
Sebastien Bourdeauducq 10212e85e7 dma_asmi: cleanup 2013-05-08 18:58:50 +02:00
Sebastien Bourdeauducq b9b6df6f29 bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source 2013-05-08 18:12:26 +02:00
Sebastien Bourdeauducq 7a2f31b2e8 platforms/papilio_pro: no reset signal by default 2013-05-07 19:10:18 +02:00
Sebastien Bourdeauducq 439f032921 crg: support for resetless system clock domain 2013-05-07 19:09:56 +02:00
Florent Kermarrec 6a4c194aab platforms: add KC705 2013-05-07 10:31:12 +02:00
Brandon Hamilton 3d0894465c mibuild: Add platform for Xilinx ML605 board 2013-05-06 14:21:56 +02:00
Sebastien Bourdeauducq e4b0e8ed6d xilinx_ise: enable register balancing 2013-05-06 14:21:39 +02:00
Sebastien Bourdeauducq 7a74dae461 actorlib/spi: add DMAWriteController 2013-05-04 17:38:54 +02:00
Sebastien Bourdeauducq fd089b146f actorlib/dma_asmi/OOOWriter: fix tag offset 2013-05-04 17:38:17 +02:00
Sebastien Bourdeauducq 12deaa91d8 flow/network/DataFlowGraph: add_buffered_connection 2013-05-02 13:25:30 +02:00
Sebastien Bourdeauducq b5b29f6d5d bank/description/CSRStorage: set reset property of storage for use in test benches 2013-05-02 11:49:23 +02:00
Sebastien Bourdeauducq 8ffa273719 flow/network: better determination of plumbing layout 2013-05-01 22:13:26 +02:00
Sebastien Bourdeauducq 471393d0f9 actorlib/dma_asmi: drive dat_wm 2013-05-01 21:52:26 +02:00
Sebastien Bourdeauducq c8810a016f actorlib/spi: add DMA read controller 2013-04-30 18:55:01 +02:00
Sebastien Bourdeauducq c70c71502e actorlib/spi/SingleGenerator: use CSR alignment bits 2013-04-30 18:54:47 +02:00
Sebastien Bourdeauducq dc0304a87b bank/description/CSRStorage: support alignment bits 2013-04-30 18:53:40 +02:00
Sebastien Bourdeauducq 51f1ace061 flow/network/CompositeActor: expose unconnected endpoints 2013-04-30 18:53:02 +02:00
Sebastien Bourdeauducq 4f13c5b74d flow/network/DataFlowGraph: add add_pipeline 2013-04-30 15:49:51 +02:00
Sebastien Bourdeauducq fb83794ef4 actorlib/spi/Collector: cleanup, new APIs 2013-04-28 18:32:46 +02:00
Sebastien Bourdeauducq 746e452838 actorlib/dma_asmi: support for writes 2013-04-28 18:06:36 +02:00
Sebastien Bourdeauducq 85e06cc100 xilinx_ise: implement NoRetiming synthesis constraint 2013-04-25 14:57:45 +02:00
Sebastien Bourdeauducq e97edd7253 genlib/fifo: disable retiming on Gray counter outputs 2013-04-25 14:57:07 +02:00
Sebastien Bourdeauducq 156ef43ace genlib/cdc: add NoRetiming 2013-04-25 14:56:45 +02:00
Sebastien Bourdeauducq b862b070d6 fhdl/verilog: recursive Special lowering 2013-04-25 14:56:26 +02:00
Sebastien Bourdeauducq 67c3119249 genlib/fifo: add asynchronous FIFO 2013-04-25 13:30:37 +02:00
Sebastien Bourdeauducq fee228a09f fhdl/specials/memory: do not write address register for async reads 2013-04-25 13:30:05 +02:00
Sebastien Bourdeauducq 6c08cd67aa graycounter: expose binary output 2013-04-25 13:11:15 +02:00
Sebastien Bourdeauducq 0f9df2d732 genlib: add Gray counter 2013-04-24 19:13:36 +02:00
Florent Kermarrec f599fe4ade Support for resetless clock domains 2013-04-23 11:54:05 +02:00
Sebastien Bourdeauducq bd0ae6592e Add setup.py 2013-04-19 14:04:59 +02:00
Sebastien Bourdeauducq 6204bcfa10 README: fix quick intro 2013-04-19 14:00:46 +02:00
Sebastien Bourdeauducq 29eaf068f3 xilinx_ise: do not attempt to source settings file on Windows 2013-04-16 22:55:24 +02:00
Sebastien Bourdeauducq 31b1960188 xilinx_ise: add --no-source option to disable sourcing of ISE settings file 2013-04-16 22:39:35 +02:00
Sebastien Bourdeauducq ceb0a99d83 Change license to 2-clause BSD 2013-04-15 23:55:30 +02:00
Sebastien Bourdeauducq 8e11fcf1d0 bus/csr/SRAM: fix Module conversion errors 2013-04-14 13:55:04 +02:00
Sebastien Bourdeauducq ea63389823 fhdl: support len() on all values 2013-04-14 13:50:26 +02:00
Werner Almesberger 59d64e92e8 mibuild: define memory card pins of the Milkymist One platorm 
This patch adds the memory card pins to the M1 platform definition in
mibuild.

I've tentatively named them "mmc". As far as I can tell, "MMC" is not
trademarked ("MultiMediaCard" the new "eMMC" would be), and "MMC" is
commonly used in the industry in a descriptive way to refer to this
sort of interface.

The original Verilog-based M1 calls the interface "mc", but since
several names have changed between milkymist and -ng, I thought I'd
use a more familiar name.

Usage example (clock signal divided by powers of two on the MMC TPs):
https://github.com/wpwrak/ming-ddc-debug/blob/counter-on-mmc/build.py

- Werner
 2013-04-12 09:51:57 +02:00
Sebastien Bourdeauducq 75d33a0c05 fhdl/verilog/_printinit: initialize undriven Special inputs (bug reported by Florent Kermarrec) 2013-04-11 18:55:49 +02:00
Sebastien Bourdeauducq 72ef4b9683 ioo+pytholite: use new Module API 2013-04-10 23:42:46 +02:00
Sebastien Bourdeauducq 4c9018ea17 fhdl/visit: add TransformModule 2013-04-10 23:42:14 +02:00
Sebastien Bourdeauducq 746acdacd1 ioo: move to genlib 2013-04-10 22:28:53 +02:00
Sebastien Bourdeauducq 1cc4c8ee9f uio: remove Trampoline (Python 3.3 provides generator delegation instead) 2013-04-10 22:15:28 +02:00
Sebastien Bourdeauducq 6ce856290a flow: match record fields by position 2013-04-10 21:33:56 +02:00
Sebastien Bourdeauducq df1ed32765 genlib/record/connect: add match_by_position 2013-04-10 21:33:45 +02:00
Sebastien Bourdeauducq 692794a21f flow: use Module and new Record APIs 2013-04-10 19:12:42 +02:00
Sebastien Bourdeauducq 843f8a5bfc platforms: add Papilio Pro 2013-04-08 20:28:23 +02:00
Sebastien Bourdeauducq 715d332c3d crg: apply constraint to IO pins, not internal signals 2013-04-08 20:28:11 +02:00
Sebastien Bourdeauducq 20bdd424c8 flow: adapt to new Record API 2013-04-01 22:15:23 +02:00
Sebastien Bourdeauducq 29b468529f bus: replace simple bus module with new bidirectional Record 2013-04-01 21:54:21 +02:00