Commit Graph

16 Commits

Author SHA1 Message Date
Florent Kermarrec b1cbfe2326 clean up/fixes 2013-03-22 11:31:21 +01:00
Florent Kermarrec 87336128a3 sim: update 2013-02-26 23:25:10 +01:00
Florent Kermarrec e95e8b03b7 - reworking WIP 2013-02-22 16:40:49 +01:00
Florent Kermarrec e6042c122c adapt migScope to Migen changes 2013-01-03 01:46:39 +01:00
Florent Kermarrec 4a59b63151 Clean up 2012-09-09 23:46:26 +02:00
Florent Kermarrec b8eaf0906a Clean up 2012-09-09 20:51:15 +02:00
Florent Kermarrec 2092c5a138 add global tb, fix bugs 2012-09-09 20:38:01 +02:00
Florent Kermarrec 2abd7f664d add tb_RecorderCsr.py
fixs in recorder.py
2012-08-27 00:44:26 +02:00
Florent Kermarrec d34c877401 split migScope to trigger & recorder 2012-08-26 21:30:23 +02:00
Florent Kermarrec a99a902fef add vcd generator 2012-08-26 20:56:56 +02:00
Florent Kermarrec 97cca81e0c tb_TriggerCsr.py : use truth table generator for Sum Lut 2012-08-26 15:44:43 +02:00
Florent Kermarrec bf7864104a tb_spi2Csr: Add clk_ratio
tb_spi2Csr: Add Read
spi2Csr : fixs
2012-08-26 13:03:11 +02:00
Florent Kermarrec 2e54001fc1 - fix Spi2Csr mistakes 2012-08-25 23:29:23 +02:00
Florent Kermarrec b5a44f2e98 add sim: tb_Spi2Csr.py (skeleton, WIP) 2012-08-25 21:53:06 +02:00
Florent Kermarrec d14ffb9146 add sim: tb_TriggerCsr.py 2012-08-25 18:46:58 +02:00
Florent Kermarrec f4cac2c102 Add simulation skeleton
Remove SRLC16E, will be replaced by distributed ram
2012-08-22 23:59:00 +02:00