Commit Graph

13 Commits

Author SHA1 Message Date
Florent Kermarrec 6107b7844a test implementation on all targets and fix issues 2015-02-28 12:04:51 +01:00
Florent Kermarrec 69e869893d remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future) 2015-02-28 11:36:15 +01:00
Florent Kermarrec 2c51adcd68 misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
Florent Kermarrec 5e2e9338d2 bios: we can now use -Ot with_rom True on targets to force bios implementation in integrated rom (can speed up debug we don't want to reflash SPI or NOR flash) 2015-02-27 17:22:44 +01:00
Florent Kermarrec 367db268ad reserve csr_map 0-->16 for gensoc internal csrs 2015-02-27 14:18:13 +01:00
Yann Sionneau edb1622668 spiflash: BB write support 2014-11-27 23:10:39 +08:00
Yann Sionneau cf92821fcf Refactor directory hierarchy of sdram phys and controllers 2014-11-27 22:09:10 +08:00
Florent Kermarrec c0c17030fd spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters 2014-09-04 15:23:39 +08:00
Sebastien Bourdeauducq 6b35c7b8ea targets/ppro: reduce SPI flash clock frequency 2014-08-22 15:24:14 +08:00
Sebastien Bourdeauducq 7b10f1821f targets/ppro: fix BIOS address 2014-08-22 15:24:00 +08:00
Sebastien Bourdeauducq 2f2a57dd34 targets/ppro: clean up indentation 2014-08-22 14:41:28 +08:00
Sebastien Bourdeauducq ca6d6954c1 targets/ppro: use migen reset synchronizer 2014-08-06 19:38:11 +08:00
Sebastien Bourdeauducq 213cb43ae5 Keep only basic SoC designs in MiSoC 2014-08-03 12:30:15 +08:00