2c53f9b2ff
interconnect/stream: add ClockDomainCrossing wrapper around AsyncFIFO.
2020-07-03 14:39:31 +02:00
23a95bea1d
integration/soc/etherbone: always run ethcore in eth_tx clock domain and remove clock_domain parameter.
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This avoid issues when sys_clk_freq < eth_tx clock like sys_clk_freq < 125MHz with 1Gbps link.
2020-07-02 11:38:54 +02:00
4575a11748
Merge pull request #581 from antmicro/i2s_tx_fix
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i2s: Fix the incorrect TX fifo almost empty offset
2020-07-01 15:27:06 +02:00
16a0aebcad
i2s: Fix the incorrect TX fifo almost empty offset
2020-07-01 13:32:53 +02:00
8f204e7797
sdcard: rename cd_sdcard to cd_sd to avoid unnecessary clock domain.
2020-07-01 12:50:24 +02:00
42bfb90f14
liblitesdcard/sdcard: add SDCARD_MULTIPLE_BLOCK_SUPPORT define.
2020-07-01 12:40:23 +02:00
e492e96bf7
integration/soc/add_sdcard: update SDEmulator.
2020-07-01 12:39:56 +02:00
996e9a9180
tools/litex_sim: cleanup cpu endianness.
2020-07-01 09:47:10 +02:00
1c631ceeee
Merge pull request #580 from Dolu1990/patch-2
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Improve verilator compilation speed
2020-07-01 08:37:03 +02:00
949a8e73c2
boards/platforms/versa_ecp5: fix mising update.
2020-07-01 08:35:54 +02:00
c0dba18d59
tools/litex_crossover_uart: add host argument to connect to a remote server.
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example: litex_server over PCIe running on a remote machine and create virtual uart on our local machine.
2020-06-30 19:19:00 +02:00
6fe4994f66
targets: add identifier on all targets and update Versa ECP5.
2020-06-30 18:32:11 +02:00
5713c21017
tools/remote/comm_pcie: use ctypes.c_uint32 to do 32-bit accesses and avoid double writes/reads.
2020-06-30 14:12:35 +02:00
68297fce9e
tools/litex_crossover_uart: add base_address argument (required when wishbone translation).
2020-06-30 14:11:27 +02:00
b455a81678
Improve verilator compilation speed
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by asking verilator to split the C++ model into multiple files.
2020-06-30 10:38:26 +02:00
54598ed2f8
software/bios/Makefile: fix #578 merge. (get back #579 ).
2020-06-29 17:01:36 +02:00
7beffba187
software/libbase/memtest: fix bus errors reporting.
2020-06-29 16:46:03 +02:00
ad76f5f3d8
Merge pull request #578 from scanakci/blackparrot_litex
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Blackparrot litex syn with master BP, upgrade to IMA
2020-06-29 14:53:33 +02:00
eafceb94f9
Merge branch 'master' into blackparrot_litex
2020-06-29 14:53:13 +02:00
5a1c3a7c16
Merge pull request #579 from antmicro/fix_building_bios
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Fix ordering of libraries
2020-06-29 14:52:37 +02:00
caf520c854
clean Makefile
2020-06-28 21:23:56 -04:00
9256a4db6d
minor change in BP top module
2020-06-28 13:10:24 -04:00
7c83a1b858
syn with master blackparrot, upgrade BP to IMA
2020-06-28 13:07:59 -04:00
dae23f2a82
Merge pull request #576 from betrusted-io/deprecate_slave
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Deprecate slave terminology
2020-06-27 09:35:04 +02:00
1e605fb23d
liblitesdcard/sdcard: update with litesdcard.
2020-06-26 20:10:10 +02:00
34e9d12ef2
interconnect/axi/AXIStreamInterface: add tuser support.
2020-06-26 08:36:16 +02:00
4094a6ec3a
liblitesdcard/sdcard: increase busy_wait and use common timeout.
2020-06-25 20:07:39 +02:00
e8f84c96a7
liblitesdcard/sdcard: decode cid only when SDCARD_DEBUG is set.
2020-06-25 13:48:49 +02:00
c07703124f
liblitesdcard/sdcard_read: enable multiple block read.
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>10MB/s read speed with a 25MHz clock.
2020-06-25 13:46:39 +02:00
d72380c871
Fix ordering of libraries
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Since libcompiler_rt provides functions for other
libraries (e.g., __muldiv3), it must be listed
at the end.
2020-06-25 12:21:36 +02:00
8c572d2b3e
targets: add fixed sdcard clock on boards with SDCard support.
2020-06-25 11:13:24 +02:00
c466900322
software/bios/litesdcard: remove sdcard_set_clk.
2020-06-25 11:12:40 +02:00
dfa3768d0e
integration/soc/add_sdcard: remove sdclk.
2020-06-25 11:12:17 +02:00
0b4c5059f2
Deprecate slave terminology
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http://oshwa.org/a-resolution-to-redefine-spi-signal-names
2020-06-25 17:12:12 +08:00
9a27465d1d
cores/clock/S6DCM: add expose_drp.
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From LiteSDCard SDClockerS6.
2020-06-25 10:11:42 +02:00
d8aa9a42e4
software/bios/boot: improve printfs.
2020-06-25 09:58:08 +02:00
55e0193701
software/libase/memtest: improve printfs and add progress bar on data test.
2020-06-25 09:57:29 +02:00
497413664e
libbase/progress: reduce to 40 HASHES_PER_LINE.
2020-06-25 09:56:13 +02:00
52d7f59af5
software/liblitedram: remove DDRPHY_CMD_DELAY support (no longer useful).
2020-06-25 09:01:33 +02:00
07f145fdaf
software/liblitedram/sdram: remove SRAM hack.
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We now have memtest bios functions to test memories and testing SRAM while used by the BIOS is probably not a good idea.
2020-06-25 08:58:01 +02:00
e2f9a82529
software/libbase/memtest: reorder functions.
2020-06-25 08:47:57 +02:00
00d1118d41
Merge pull request #575 from antmicro/jboc/memtest
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Move memtest from liblitedram to libbase
2020-06-25 08:29:23 +02:00
3b084b284a
bios: move memtest from liblitedram to libbase
2020-06-24 14:53:18 +02:00
3a5aec6933
software/liblitesdcard: simplify, switch to DMAs, remove clocking/test functions.
2020-06-24 12:25:37 +02:00
fd4765e159
integration/soc: replace SDDataReader/SDDataWriter with DMAs.
2020-06-24 12:23:35 +02:00
bc64e35480
soc/cores: add simple DMA with WishboneDMAReader/WishboneDMAWriter.
2020-06-24 12:22:44 +02:00
d7cc7d2ac6
platforms/genesys2: add usb_fifo.
2020-06-23 18:01:51 +02:00
309eda4246
litex_term: keep and reduce inter-frame delay to 1e-5.
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Removing it completely would require revisiting the gateware/firmware code of the
UART. Since this is use for test purpose only and already allow > 600KB/s upload
speed, keeping it is acceptable.
2020-06-23 17:20:12 +02:00
64589cfd2b
soc/cores/uart/FT245: only use Asynchronous FIFO (Synchronous FIFO requires a software configuration).
2020-06-23 16:53:17 +02:00
0780b629a9
soc/cores/usb_fifo: cleanup and reduce fifo_depth (provide similar throughput when used as UART).
2020-06-23 16:51:24 +02:00
Florent Kermarrec
Pawel Sagan
Dolu1990
sadullah
Mateusz Holenko
bunnie
Jędrzej Boczar