Florent Kermarrec
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649cdeb265
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liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen
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2015-03-01 16:48:41 +01:00 |
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Florent Kermarrec
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9e01bf5fdd
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litesata: create example design derived from SoC
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2015-03-01 11:33:38 +01:00 |
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Florent Kermarrec
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c21a7956c8
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liteXXX cores: remove Identifier duplication
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2015-03-01 11:24:58 +01:00 |
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Florent Kermarrec
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69e869893d
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remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)
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2015-02-28 11:36:15 +01:00 |
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Florent Kermarrec
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0dfca49e68
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litesata: move file and modify import to misoclib.mem.litesata
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2015-02-28 11:03:24 +01:00 |