18 commits

Author	SHA1	Message	Date
Sebastien Bourdeauducq	91d7b656a9	Switch to LASMI, bug pandemonium	2013-06-11 14:18:16 +02:00
Sebastien Bourdeauducq	611c4192b1	Use migen.fhdl.std	2013-05-22 17:10:13 +02:00
Sebastien Bourdeauducq	a9b723568a	Use new module, autoreg and eventmanager Migen APIs	2013-03-10 19:32:38 +01:00
Sebastien Bourdeauducq	a22ada36d7	corelogic -> genlib	2013-02-24 12:31:00 +01:00
Sebastien Bourdeauducq	293a62dabe	Replace Signal(bits_for(... with Signal(max=...	2012-11-29 23:41:51 +01:00
Sebastien Bourdeauducq	8bf6945dfd	Use new bitwidth/signedness system	2012-11-29 23:38:04 +01:00
Sebastien Bourdeauducq	7e2bc00c0a	Remove Constant	2012-11-28 23:18:53 +01:00
Sebastien Bourdeauducq	79e5f24a65	Workaround for zero-delay loop simulation problem with Icarus Verilog. TODO: clarify and revert this commit.	2012-11-28 22:49:22 +01:00
Sebastien Bourdeauducq	a5d6ced181	asmicon: fix and simplify refresh grant logic	2012-08-04 22:59:21 +02:00
Sebastien Bourdeauducq	1451cad710	asmicon/multiplexer: correct read-to-write delay to prevent conflicts on the tag bus	2012-08-04 17:38:42 +02:00
Sebastien Bourdeauducq	768a3a826a	x.bv.width -> len(x)	2012-07-13 18:33:03 +02:00
Sebastien Bourdeauducq	809cd99205	asmicon: remove uses of multimux	2012-07-13 18:05:26 +02:00
Sebastien Bourdeauducq	425c8b8e70	asmicon/multiplexer: fix read tag delay	2012-05-15 13:13:40 +02:00
Sebastien Bourdeauducq	d2c4afe66c	asmicon: various fixes. Now produces convincing refresh/read sequences.	2012-04-01 23:24:24 +02:00
Sebastien Bourdeauducq	c26efa28ca	asmicon: multiplexer (untested)	2012-03-18 22:11:01 +01:00
Sebastien Bourdeauducq	b1eb919ad2	asmicon: bank machine (untested)	2012-03-18 00:12:03 +01:00
Sebastien Bourdeauducq	7c377880fa	asmicon: refresher (untested)	2012-03-15 20:29:26 +01:00
Sebastien Bourdeauducq	7b14e0bd05	asmicon: skeleton	2012-03-14 18:26:05 +01:00