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Author SHA1 Message Date
Florent Kermarrec
649cdeb265 liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen 2015-03-01 16:48:41 +01:00
Florent Kermarrec
2c51adcd68 misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
Renamed from misoclib/liteeth/generic/__init__.py (Browse further)