0f8f89a269
update clock constraints for SATA1 and use sys_clk of 200MHz
...
- data seems stable (mila capture) except when receive the ALIGN primtive from the device, we should maybe disable alignment on the HOST when link is ready...
2014-12-17 19:24:23 +01:00
5a16a5b46d
add very basic PHY stimulator (to see HDD behaviour when we send primitives)
2014-12-17 17:57:37 +01:00
8f9efde39e
regroup all constants/ definitions in common
2014-12-14 10:45:26 +01:00
64ed34b35a
clean up
2014-11-11 16:15:28 +01:00
294855e292
phy: use primitives dict and use only sata.std
2014-11-11 10:19:24 +01:00
47b5ff5e33
move code and create a directory for each layer
2014-11-03 17:38:12 +01:00
Florent Kermarrec