Florent Kermarrec
|
f7c0b118ce
|
test/test_targets: cover all platforms
|
2019-04-23 11:38:18 +02:00 |
|
Florent Kermarrec
|
7d278854d5
|
global: switch to VexRiscv as the default CPU
VexRiscv can now replace LM32 for almost all usecases and we now have better
software support with RISC-V.
|
2019-04-22 09:41:07 +02:00 |
|
Florent Kermarrec
|
28d80bd641
|
ci: fix test_targets/test_simple
|
2019-04-22 08:53:43 +02:00 |
|
Florent Kermarrec
|
e98ac680c1
|
travis: simplify, enable and add RISC-V toolchain to build targets
|
2019-04-22 08:32:00 +02:00 |
|
Florent Kermarrec
|
68e1dfca28
|
boards: avoid duplicating platforms that can be found in migen/litex-buildenv
The platforms that are kept are the ones used for litex development.
|
2019-01-06 19:01:19 +01:00 |
|
Florent Kermarrec
|
5137c2bf88
|
test/test_targets: update
|
2018-11-17 17:36:57 +01:00 |
|
Florent Kermarrec
|
0b0e3ac1dd
|
test/test_targets: test simple design with all platforms
|
2018-09-24 02:02:14 +02:00 |
|
Florent Kermarrec
|
e04530e0c4
|
test/test_targets: update and reorganize targets
|
2018-09-24 01:15:33 +02:00 |
|
Florent Kermarrec
|
1925ba176f
|
replace litex.gen imports with migen imports
|
2018-02-23 13:38:19 +01:00 |
|
Florent Kermarrec
|
b4ebfb4031
|
test/test_targets: check top.v generation
|
2017-04-24 19:25:58 +02:00 |
|
Florent Kermarrec
|
35e3d93d9b
|
test: add basic test_targets.py
|
2017-04-24 19:13:17 +02:00 |