Florent Kermarrec
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2fc2f8a6c0
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migen/genlib/io: use 0 instead of Signal() for default rst value (immutable thanks sb)
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2015-03-18 14:41:43 +01:00 |
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Florent Kermarrec
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89fefef3f8
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genlib/io: add optional external rst to CRG
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2015-03-17 16:22:22 +01:00 |
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Florent Kermarrec
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69ce6dd48c
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migen/genlib/io: add DDRInput and DDROutput
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2015-03-16 22:47:13 +01:00 |
Sebastien Bourdeauducq
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6a979a8023
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mibuild: sanitize default clock management
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2015-03-14 00:10:08 +01:00 |
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Florent Kermarrec
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ff266bc2ee
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migen/genlib/io: add DifferentialOutput and Xilinx implementation
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2015-03-12 19:30:57 +01:00 |
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Florent Kermarrec
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bf28664cb4
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genlib/io.py: fix copy/paste error (thanks rjo)
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2015-03-12 18:49:49 +01:00 |
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Florent Kermarrec
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c8ba8cde8e
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migen/genlib: add io.py to define generic I/O specials to be lowered by mibuild
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2015-03-12 18:38:53 +01:00 |