Sebastien Bourdeauducq
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792b8fed1b
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bus/asmi: port sharing support
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2013-05-12 15:58:39 +02:00 |
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Sebastien Bourdeauducq
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534dec62eb
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First video mixing working (hacky)
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2013-05-12 15:58:08 +02:00 |
Yann Sionneau
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301008cd0c
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Some Makefile love
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2013-05-12 14:24:18 +02:00 |
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Sebastien Bourdeauducq
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f202946717
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fhdl/tools/_TargetLister: do not include array keys in targets
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2013-05-11 17:28:41 +02:00 |
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Sebastien Bourdeauducq
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e35315bb24
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cleanup
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2013-05-11 12:45:30 +02:00 |
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Sebastien Bourdeauducq
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0ec6a7eb4e
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genlib/record: match_by_position -> connect_flat
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2013-05-11 11:48:21 +02:00 |
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Sebastien Bourdeauducq
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8c335d66fd
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framebuffer: fix alpha blending
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2013-05-11 09:21:12 +02:00 |
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Sebastien Bourdeauducq
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e96b027dee
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Framebuffer mixing
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2013-05-10 21:03:55 +02:00 |
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Sebastien Bourdeauducq
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955a9733c8
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Revert "genlib/record/connect: add match_by_position"
This reverts commit df1ed32765.
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2013-05-10 17:41:51 +02:00 |
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Sebastien Bourdeauducq
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3ab83fb693
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framebuffer: reorganize in preparation for mixer
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2013-05-09 19:23:22 +02:00 |
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Sebastien Bourdeauducq
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6f11ddb079
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software/dvisampler: periodically reset PLL until locked + recalibrate IO every second
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2013-05-09 14:11:08 +02:00 |
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Sebastien Bourdeauducq
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546aa76aef
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software/dvimixer: support two channels
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2013-05-09 13:41:21 +02:00 |
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Sebastien Bourdeauducq
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06064d33aa
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dvisampler/dma: better 8:8:8 -> 10:10:10 conversion
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2013-05-09 11:27:24 +02:00 |
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Sebastien Bourdeauducq
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c6d553e4e4
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software/videomixer: interrupt-driven video passthrough
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2013-05-09 10:52:43 +02:00 |
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Sebastien Bourdeauducq
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fe87221d2b
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dvisampler/dma: reverse slot allocation order
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2013-05-09 10:51:50 +02:00 |
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Sebastien Bourdeauducq
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2df4ff0ad9
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dvisampler/dma: fix interrupt generation
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2013-05-09 10:51:34 +02:00 |
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Sebastien Bourdeauducq
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d685ed21fc
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dvisampler/dma: bugfixes
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2013-05-08 22:50:40 +02:00 |
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Sebastien Bourdeauducq
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66b4bae7c8
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top: connect dvisampler DMA IRQs
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2013-05-08 22:31:42 +02:00 |
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Sebastien Bourdeauducq
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b3d87e1c79
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software/videomixer: use new DMA engine
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2013-05-08 22:31:18 +02:00 |
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Sebastien Bourdeauducq
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29efa85dec
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dvisampler: new DMA engine (buggy)
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2013-05-08 22:31:01 +02:00 |
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Sebastien Bourdeauducq
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c82b53f1cd
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bank/description/AutoCSR: add autocsr_exclude
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2013-05-08 20:58:57 +02:00 |
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Sebastien Bourdeauducq
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89dbc37ece
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cif: do not generate write function for CSRStatus
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2013-05-08 20:58:27 +02:00 |
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Sebastien Bourdeauducq
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10212e85e7
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dma_asmi: cleanup
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2013-05-08 18:58:50 +02:00 |
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Sebastien Bourdeauducq
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b9b6df6f29
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bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source
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2013-05-08 18:12:26 +02:00 |
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Sebastien Bourdeauducq
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8e76c960d9
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timer, uart: EventSourceLevel -> EventSourceProcess
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2013-05-08 18:11:42 +02:00 |
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Sebastien Bourdeauducq
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7a2f31b2e8
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platforms/papilio_pro: no reset signal by default
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2013-05-07 19:10:18 +02:00 |
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Sebastien Bourdeauducq
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439f032921
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crg: support for resetless system clock domain
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2013-05-07 19:09:56 +02:00 |
Florent Kermarrec
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6a4c194aab
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platforms: add KC705
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2013-05-07 10:31:12 +02:00 |
Brandon Hamilton
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3d0894465c
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mibuild: Add platform for Xilinx ML605 board
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2013-05-06 14:21:56 +02:00 |
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Sebastien Bourdeauducq
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e4b0e8ed6d
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xilinx_ise: enable register balancing
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2013-05-06 14:21:39 +02:00 |
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Sebastien Bourdeauducq
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e2d15b169a
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dvisampler: mostly working, very basic and slightly buggy DMA
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2013-05-06 09:58:12 +02:00 |
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Sebastien Bourdeauducq
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f82a16f3a3
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software/videomixer: send to framebuffer
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2013-05-06 09:56:49 +02:00 |
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Sebastien Bourdeauducq
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679d13c99c
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another attempt at fixing clock routing issues
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2013-05-06 09:56:10 +02:00 |
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Sebastien Bourdeauducq
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784e96bb87
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build.py: LOC clock generator components to limit breakage of the ISE shitware
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2013-05-05 23:07:15 +02:00 |
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Sebastien Bourdeauducq
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11cbdf0d4f
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build.py: support single DVI sampler
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2013-05-05 20:56:58 +02:00 |
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Sebastien Bourdeauducq
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d05f3d22e0
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chansync: bugfix
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2013-05-05 15:07:57 +02:00 |
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Sebastien Bourdeauducq
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9c0d13b615
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tb: add chansync
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2013-05-05 15:07:36 +02:00 |
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Sebastien Bourdeauducq
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d175e01876
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dvisampler: connect sync polarity detection
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2013-05-05 12:58:53 +02:00 |
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Sebastien Bourdeauducq
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cb008a061c
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dvisampler/chansync: fix FIFO width
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2013-05-05 12:58:24 +02:00 |
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Sebastien Bourdeauducq
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ad01dc8a74
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software/videomixer: use new resdetection regs
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2013-05-05 11:58:43 +02:00 |
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Sebastien Bourdeauducq
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ea20b74ed1
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dvisampler/resdetection: use DE instead of hsync
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2013-05-05 11:54:36 +02:00 |
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Sebastien Bourdeauducq
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e3e1dcd547
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dvisampler: add sync polarity detection module (thanks Lars for suggestions)
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2013-05-05 11:53:38 +02:00 |
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Sebastien Bourdeauducq
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71e3bba228
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dvisampler/decoding: hold C when DE=1
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2013-05-05 11:51:48 +02:00 |
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Sebastien Bourdeauducq
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4259699d78
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dvisampler: add RawDVISampler
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2013-05-04 20:40:21 +02:00 |
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Sebastien Bourdeauducq
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63073319b0
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dvisampler/datacapture: swap bit pairs
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2013-05-04 20:38:50 +02:00 |
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Sebastien Bourdeauducq
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7a74dae461
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actorlib/spi: add DMAWriteController
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2013-05-04 17:38:54 +02:00 |
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Sebastien Bourdeauducq
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fd089b146f
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actorlib/dma_asmi/OOOWriter: fix tag offset
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2013-05-04 17:38:17 +02:00 |
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Sebastien Bourdeauducq
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53e5c4f59c
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build: only add UCF constraints for the cores that are present
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2013-05-02 23:56:09 +02:00 |
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Sebastien Bourdeauducq
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12deaa91d8
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flow/network/DataFlowGraph: add_buffered_connection
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2013-05-02 13:25:30 +02:00 |
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Sebastien Bourdeauducq
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b5b29f6d5d
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bank/description/CSRStorage: set reset property of storage for use in test benches
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2013-05-02 11:49:23 +02:00 |