Florent Kermarrec
|
5c43d4d091
|
litescope: create example design derived from SoC that can be used on all targets
|
2015-02-28 22:19:24 +01:00 |
|
Florent Kermarrec
|
165a5b6760
|
soc: use self.cpu_reset_address as rom mem_map address and increase default bios size to 0xa000
|
2015-02-28 20:04:51 +01:00 |
|
Florent Kermarrec
|
8564b7eb6a
|
soc: move SDRAMSoC to a separate sdram.py file (ideally part of SDRAMSoC should move mem/sdram)
|
2015-02-28 11:44:14 +01:00 |
|
Florent Kermarrec
|
69e869893d
|
remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)
|
2015-02-28 11:36:15 +01:00 |