Sebastien Bourdeauducq
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0bea1e2589
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asmi: dat_wm high to disable data write
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2012-05-15 14:41:54 +02:00 |
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Sebastien Bourdeauducq
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0b62e573ae
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sim: pass extra keyword arguments to Verilog converter
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2012-04-30 16:38:17 -05:00 |
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Sebastien Bourdeauducq
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2a4e49e381
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fhdl: phase out pads
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2012-04-02 19:21:43 +02:00 |
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Sebastien Bourdeauducq
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f6e76ae198
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doc: more examples and comments
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2012-03-10 19:38:39 +01:00 |
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Sebastien Bourdeauducq
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1f4c58ee26
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doc: cosmetic changes (thanks sh4rm4 for reporting typos)
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2012-03-10 17:59:42 +01:00 |
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Sebastien Bourdeauducq
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78c707e354
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doc: use script font
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2012-03-09 21:57:50 +01:00 |
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Sebastien Bourdeauducq
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7b1101ab99
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doc: simulation
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2012-03-09 21:17:21 +01:00 |
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Sebastien Bourdeauducq
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0165d23295
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doc: cosmetic changes (thanks rofl0r for reporting typos)
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2012-03-09 18:26:00 +01:00 |
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Sebastien Bourdeauducq
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59db4e9106
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doc: add logo
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2012-03-09 17:16:33 +01:00 |
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Sebastien Bourdeauducq
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90546fd811
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doc: switch to sphinx
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2012-03-09 17:08:38 +01:00 |
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Sebastien Bourdeauducq
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fa9cf3e466
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bus: add DFI
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2012-02-15 18:09:14 +01:00 |
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Sebastien Bourdeauducq
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d6da88d11d
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doc: update ASMI description
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2012-02-13 17:23:32 +01:00 |
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Sebastien Bourdeauducq
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c1bff38861
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doc: update Bank description
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2012-02-08 19:26:56 +01:00 |
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Sebastien Bourdeauducq
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0cc7e2ac1e
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fhdl: make WRITE_FIRST default
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2012-01-27 21:35:58 +01:00 |
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Sebastien Bourdeauducq
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2726ba2242
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doc: memories
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2012-01-27 21:23:17 +01:00 |
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Sebastien Bourdeauducq
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5466a82933
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doc: cosmetic changes
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2012-01-27 14:35:58 +01:00 |
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Sebastien Bourdeauducq
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bf2f6f31e3
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doc: ASMI description
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2012-01-26 18:01:17 +01:00 |
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Sebastien Bourdeauducq
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009ebd1106
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doc: refactor
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2012-01-25 20:01:45 +01:00 |