Sebastien Bourdeauducq
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a3909bb5e2
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Merge branch 'master' of https://github.com/m-labs/misoc
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2015-02-26 21:28:12 -07:00 |
Yann Sionneau
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8364fe6674
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target/kc705: allow access to pll_sys signal before BUFG
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2015-02-26 15:56:10 -07:00 |
Florent Kermarrec
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5e8a0c496d
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gensoc: add mem_map and mem_decoder to avoid duplications
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2015-02-26 20:12:27 +01:00 |
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Florent Kermarrec
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00862a383c
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liteeth: fix import (from liteeth --> from misoclib.liteeth)
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2015-02-26 09:48:37 +01:00 |
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Florent Kermarrec
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73ab271f9a
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targets/kc705: fix csr address conflict on eth
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2015-02-18 10:45:18 -07:00 |
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Florent Kermarrec
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0a38b8c74a
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add LiteX external core and remove ethmac
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2015-02-18 10:43:44 -07:00 |
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Yann Sionneau
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edb1622668
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spiflash: BB write support
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2014-11-27 23:10:39 +08:00 |
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Yann Sionneau
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cf92821fcf
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Refactor directory hierarchy of sdram phys and controllers
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2014-11-27 22:09:10 +08:00 |
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Sebastien Bourdeauducq
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33530e0921
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ethmac: style/renaming
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2014-11-20 18:01:48 -08:00 |
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Sebastien Bourdeauducq
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7eaa5f7372
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targets/kc705: avoid ddrphy/ethphy address conflict
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2014-11-20 17:11:57 -08:00 |
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Florent Kermarec
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603c2641bb
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new Ethernet MAC
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2014-11-20 16:47:22 -08:00 |
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Florent Kermarrec
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c0c17030fd
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spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters
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2014-09-04 15:23:39 +08:00 |
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Sebastien Bourdeauducq
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0eeb0ad9eb
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targets/kc705: add ddrphy to CSR map
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2014-09-01 16:40:10 +08:00 |
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Sebastien Bourdeauducq
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35327a427f
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targets/kc705: BIOS XIP
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2014-08-22 17:13:10 +08:00 |
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Sebastien Bourdeauducq
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41c8c172b5
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targets/kc705: integrate DDR3
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2014-08-08 21:58:41 +08:00 |
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Sebastien Bourdeauducq
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fb48b89bac
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platforms/kc705: generate clocks for SDRAM
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2014-08-06 23:53:26 +08:00 |
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Sebastien Bourdeauducq
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37968e649b
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targets/kc705: use PLL for clocking
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2014-08-03 21:42:39 +08:00 |
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Sebastien Bourdeauducq
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f7a7137127
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targets: add basic KC705
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2014-08-03 15:48:30 +08:00 |