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170 commits

Author SHA1 Message Date
Florent Kermarrec
daa4307d9e add CONTRIBUTORS file and add copyright header to all files 2019-06-23 23:23:56 +02:00
Florent Kermarrec
361f9d0dff bios/sdram: set init_done/error when DDRCTRL is present (litedram_gen) 2019-06-22 10:55:15 +02:00
Ambroz Bizjak
ca70ea91e4
bios: Fix build when ethphy is present but ethmac is not. 
While testing my Ethernet DMA, I renamed the `ethmac` module to `ethmac_dma` so that it wouldn't be used from the BIOS, but I got an undefined reference to `eth_init` because `bios.c` checks different CSR defines than the code that defines `eth_init`.
 2019-06-13 01:02:22 +02:00
Florent Kermarrec
ca4e7811e9 software/bios: change prompt to "litex" in green. 2019-06-07 11:13:36 +02:00
Gabriel L. Somlo
f88b85a31c software/libbase: memcpy: simple, arch-width agnostic implementation 
Remove optimizations targeted specifically at rv32 architecture,
allowing memcpy to work on all word sizes.

Since this is "only" the BIOS, it is also arguably better to
optimize for size rather than performance, given that control
will be quickly handed over to some other program being loaded.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-06-04 14:48:51 -04:00
bunnie
ab0b2cac2e fix signed char type to be explicitly signed 2019-06-03 06:01:13 +00:00
bunnie
200d413def update stdint.h to include c99 types 
needed for some third party libraries to compile
 2019-06-02 22:27:12 +00:00
Florent Kermarrec
961101d809 bios/irc: remove compilation workaround 2019-05-25 09:24:48 +02:00
Florent Kermarrec
712977a0cf software/bios/isr.c: workaround compilation issue (need to be fixed) 2019-05-24 10:18:50 +02:00
Gabriel L. Somlo
1a530cf27d soc/cores/cpu/rocket: Support for 64-bit RocketChip (experimental) 
Simulate a Rocket-based 64-bit LiteX SoC with the following command:

  litex/tools/litex_sim.py [--with-sdram] --cpu-type=rocket

NOTE: Synthesizes to FPGA and passes timing at 50MHz on nexys4ddr
(with vivado) and ecp5versa (with yosys/trellis/nextpnr), but at
this time does not yet properly initialize physical on-board DRAM.
On ecp5versa, using '--with-ethernet', up to 97% of the available
TRELLIS_SLICE capacity is utilized.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-05-23 15:59:51 -04:00
Florent Kermarrec
1ea22d49b7 software/include/base/csr-defs.h: add specific CSR_IRQ_MASK/PENDING for Minerva 2019-05-15 22:40:32 +02:00
Florent Kermarrec
f25707012f software/bios/boot: remove specific linux commands (not needed with device tree) 2019-05-14 11:45:16 +02:00
Florent Kermarrec
6e4ac1c493 LICENSE: clarify 2019-05-11 09:26:51 +02:00
Gabriel L. Somlo
c264a00964 soc/integration/cpu_interface: more arch-specific address size fixes 
When generating arch-specific include files (generated/[mem|csr].h)
ensure address literal defines are suffixed by 'L', denoting their
'unsigned long' type. This inhibits compiler warnings when values
computed based on these constants are cast to pointers.

Also ensure csr_[read|write][b|w|l]() function declarations have
'unsigned long' address arguments.

Finally, restore the correct (32-bit, (unsigned *)) expected
behavior of the MMPTR() macro, inadvertently converted to an
arch-specific sized access (unsigned long *) by commit 5c2b8685.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-05-08 16:03:36 -04:00
Florent Kermarrec
b7e3713388 bios/boot/ update linux memory mapping 2019-05-07 11:59:28 +02:00
Florent Kermarrec
fcd518b5d0 bios/boot: add specific flash_boot for linux with vexriscv 2019-05-04 11:27:01 +02:00
Florent Kermarrec
1ba1ad9a00 bios/boot: rename MM_RAM to EMULATOR_RAM 2019-05-03 19:47:36 +02:00
Florent Kermarrec
21bf10383d bios/boot: add liftoff banner just before booting 2019-05-02 18:26:35 +02:00
Florent Kermarrec
8f4685b3b1 bios/boot/netboot: only get boot.bin as default, add linux_vexriscv netboot config 2019-05-02 16:34:41 +02:00
Gabriel L. Somlo
5c2b8685fc software: use "unsigned long" for address values, also 8-byte alignment 
Enable future support for 64-bit CPU models.
 2019-04-29 15:03:38 -04:00
Florent Kermarrec
e8f3c49127 software/libnet/microudp: rearrange send_packet, add comments and remove txlen padding 2019-04-24 11:32:40 +02:00
Florent Kermarrec
44e0cdda9a software/libnet/microudp: speed-up ARP by changing timeout/tries 
First ARP request does not seem to be transmitted (the link is probably not
fully established). Reduce the timeout between tries and increase number of
tries.
 2019-04-24 09:55:41 +02:00
Florent Kermarrec
9ee6c35b42 tools: move from litex.soc.tools to litex.tools and fix usb.core import 2019-04-20 10:44:53 +02:00
Florent Kermarrec
13a76ec7fb software/libnet/microudp: simplify txbuffer managment 2019-04-12 18:47:31 +02:00
Florent Kermarrec
3441eb05cb software/libnet/microudp: cleanup eth_init 2019-04-12 17:15:09 +02:00
Florent Kermarrec
92a79c6dc1 software/libnet/microudp: simplify rxbuffer managment 2019-04-12 17:14:07 +02:00
Florent Kermarrec
fdeff7f64f software/libnet/microudp: set raw frame size to ETHMAC_SLOT_SIZE 2019-04-12 17:09:50 +02:00
Florent Kermarrec
1569e2e0cf software/libnet: remove use of ethmac_mem.h 2019-04-12 17:08:29 +02:00
Florent Kermarrec
c7ac96761c bios/sdram: add __attribute__((unused)) on cdelay 2019-04-11 22:26:58 +02:00
Florent Kermarrec
f8dcdb70d2 software/libnet: add #ifdef on eth_init 2019-04-10 16:16:47 +02:00
Caleb Jamison
1f0b3f8124 Add ifdef check for MAIN_RAM_SIZE 2019-03-31 10:33:39 -05:00
Florent Kermarrec
dd214d2d21 bios/main: align SoC info, show CPU speed on CPU line, show L2 2019-03-30 11:49:39 +01:00
Florent Kermarrec
6599f7bb50 bios/main: move sdrinit 2019-03-30 10:56:17 +01:00
Florent Kermarrec
b92b89ab92 bios/main: print boot sequence only if sdr_ok 2019-03-30 10:19:00 +01:00
Florent Kermarrec
f4369c8fb2 bios/main: remove csr functions (not used and only supported by lm32), improve help presentation 2019-03-29 19:40:24 +01:00
Florent Kermarrec
66dffb7071 software/bios: improve readibility, add soc informations 2019-03-29 00:51:16 +01:00
Florent Kermarrec
317dba8314 software/bios/sdram: use specific ERR_DDRPHY_BITSLIP/NMODULES computation 
In the future, the PHYs should generated these constants.
 2019-03-05 18:03:24 +01:00
Florent Kermarrec
ca63db4040 bios/sdram: use burstdet detection for ECP5DDRPHY init 2019-03-05 13:27:06 +01:00
Florent Kermarrec
4bf789eab9 soc/software/bios/boot: add vexriscv workaround 
Flushing icache was working correctly on previous version of Vexriscv, understand
why it's no longer the case.
 2019-03-01 09:16:48 +01:00
Florent Kermarrec
e38dfd99e8 soc/software/sdram: fix compilation on ultrascale 2019-02-25 16:12:21 +01:00
Florent Kermarrec
3dd529e40b soc/software/bios/sdram: add ECP5 support 2019-02-25 14:41:33 +01:00
Florent Kermarrec
2fd6d0e7e1 soc/software/bios/sdram: improve write_level robustness 2019-02-25 14:38:24 +01:00
Florent Kermarrec
36772b75f6 soc/software/bios/sdram: improve sdrlevel readibility 2019-02-25 14:37:31 +01:00
Florent Kermarrec
6a980781d3 soc/software/bios/sdram: add helpers for rst/inc of delays 2019-02-25 14:36:47 +01:00
Florent Kermarrec
ebe0d567f8 bios/sdram: only show read delays when they are valid. 2018-12-19 11:19:47 +01:00
Florent Kermarrec
67a2590235 bios/sdram: reduce write leveling scan range 2018-12-19 11:18:19 +01:00
Florent Kermarrec
a27b5a3be1 update Ultrascale DDRPHY 2018-12-18 11:25:21 +01:00
Florent Kermarrec
f8f3683aaa bios/sdram: reduce scans verbosity on ultrascale 2018-12-17 16:00:44 +01:00
Florent Kermarrec
efce434aa9 bios/sdram: use ddrphy_half_sys8x_taps_read() for KUSDDRPHY 2018-12-17 11:43:21 +01:00
Tim 'mithro' Ansell
22d454efcd Hack to fix #136. 2018-12-16 14:40:10 -08:00