eb1417c5ed
fhdl: move insert_resets to tools
2013-08-08 11:32:58 +02:00
411e6ec114
fhdl/tools: do not export resort_statements
2013-07-17 16:50:09 +02:00
d5d2e64dc3
Revert "fhdl/tools/group_by_target: remove resort_statements"
...
This reverts commit 939f01cee2
2013-07-17 16:49:26 +02:00
939f01cee2
fhdl/tools/group_by_target: remove resort_statements
2013-07-17 10:38:39 +02:00
16ebe41028
fhdl/tools: BUGFIX: fix group_by_target grouping
...
group_by_target does not properly combine target groups if statements
are presented in the order:
({A}, statement1)
({B}, statement2)
({A, B}, statement3)
which returns groups:
({A, B}, [statement1, statement3])
({B}, [statement2])
This patch fixes group_by_target such that the resulting group is:
({A, B}, [statement1, statement2, statement3])
2013-07-17 10:14:39 +02:00
faa8b7c49a
fhdl/tools: clock domain merging for clock renaming
2013-07-16 18:17:44 +02:00
04efee7847
fhdl: mark variable as deprecated
2013-06-30 20:14:20 +02:00
ded5e569eb
fhdl/tools: separate complex slice lowerer from basic lowerer
2013-06-30 14:32:19 +02:00
a255296171
support re-slicing and non-unit step size
...
* support slicing of Slice/Cat/Replicate through lowering
* support non-unit step size slices through unpacking and Cat()
2013-06-30 14:03:34 +02:00
f0b0942055
bitreverse: fhdl/tools -> genlib/misc
2013-05-30 18:44:37 +02:00
70ffe86356
New migen.fhdl.std to simplify imports + len->flen
2013-05-22 17:11:09 +02:00
f202946717
fhdl/tools/_TargetLister: do not include array keys in targets
2013-05-11 17:28:41 +02:00
f599fe4ade
Support for resetless clock domains
2013-04-23 11:54:05 +02:00
ea63389823
fhdl: support len() on all values
2013-04-14 13:50:26 +02:00
7a06e9457c
Lowering of Special expressions + support ClockSignal/ResetSignal
2013-03-18 18:36:50 +01:00
dc55289323
fhdl/tools/_ArrayLowerer: complete support for arrays as targets
2013-03-18 14:38:01 +01:00
e95d2f4779
fhdl/tools/value_bits_sign: support not
2013-03-18 09:52:43 +01:00
bd8bbd9305
Make ClockDomains part of fragments
2013-03-15 18:17:33 +01:00
72fb6fd6bd
fhdl/tools/flat_iteration: generalize
2013-03-09 23:03:15 +01:00
c10622f5e2
fhdl/verilog: insert reset before listing signals
2013-02-27 18:10:04 +01:00
49cfba50fa
New 'specials' API
2013-02-22 17:56:35 +01:00
dc93a231c6
fhdl: tristate support
2013-02-15 00:17:24 +01:00
badba89686
fhdl: support nested statement lists
2013-01-05 14:18:15 +01:00
3fae6c8f03
Do not use super()
2012-12-18 14:54:33 +01:00
b06fbdedd6
fhdl/tools: bitreverse
2012-12-14 23:56:16 +01:00
50ed73c937
New specification for width and signedness
2012-11-29 21:22:38 +01:00
6eebfce44a
Refactor Case
2012-11-29 01:11:15 +01:00
fee22a4631
Remove Constant
2012-11-28 23:18:43 +01:00
a2bcbfdf8f
fhdl/tools: use NodeTransformer to lower arrays
2012-11-28 17:46:15 +01:00
3bc15024ac
fhdl/tools: use NodeVisitor
2012-11-26 21:40:23 +01:00
9d3e218863
fhdl: use object creation counter (HUID) as hash. This finally makes the generated code textually the same across runs.
2012-11-23 18:38:03 +01:00
3971600917
fhdl/structure: use sets for memories and instance collections
2012-11-23 17:20:08 +01:00
c273866b08
fhdl: support expressions in instance ports
2012-09-22 20:51:10 +02:00
9a18a9df3f
fhdl: list signals in execution order
2012-09-11 09:59:37 +02:00
e16353a281
Multi-clock design support + new instance API
2012-09-10 23:45:02 +02:00
599ed8d470
fhdl: fix value_bv for operators
2012-07-13 17:40:49 +02:00
7f47a2568a
fhdl: remove _StatementList
2012-07-13 17:07:56 +02:00
eed8fa374d
fhdl/arrays: use correct BV for intermediate signals
2012-07-11 12:06:32 +02:00
ed27783a53
fhdl: arrays (TODO: use correct BV for intermediate signals)
2012-07-09 15:16:38 +02:00
ca7056b07f
fhdl: support forwarding of bidirectional signals from instance ports
2012-02-16 18:34:32 +01:00
a5bd111370
fhdl/verilog: clean up signal classification and support memory descriptions
2012-01-27 16:54:48 +01:00
e9be3241f6
Fix instance support
2012-01-20 22:36:17 +01:00
ab8e08a2ed
fhdl: new naming system (broken)
2012-01-16 18:09:52 +01:00
aa8b8da684
fhdl: allow None statements
2012-01-15 17:45:54 +01:00
7b395b565e
verilog: split comb block, use assign statements
2012-01-07 12:19:06 +01:00
f209bf6b33
convtools -> tools
2012-01-07 00:39:28 +01:00
Sebastien Bourdeauducq
David Carne
Robert Jördens
Florent Kermarrec