litex/misoclib/mem/sdram/phy
Florent Kermarrec 50e857e99c sdram/phy/s6ddrphy: add S6QuarterRateDDRPHY to run DDR3 at higher frequencies.
Built on top of S6HalfRateDDRPHY, exposes a 4 phases DFI interface to the controller with a 2x slower clock.
Validated on the Numato Lab opsis board (50MHz sys_clk/ DDR400), should also work on the Novena laptop (same DDR3 module).
2015-08-22 12:17:48 +02:00
..
dfi.py global: more pep8 2015-04-13 18:02:26 +02:00
dfii.py global: pep8 (E261, E271) 2015-04-13 17:16:12 +02:00
gensdrphy.py global: pep8 (E302) 2015-04-13 16:47:22 +02:00
initsequence.py sdram/phy/initsequence: add burst chop 4 (BC4) for DDR3 2015-08-04 11:19:20 +02:00
k7ddrphy.py global: more pep8 2015-04-13 18:02:26 +02:00
s6ddrphy.py sdram/phy/s6ddrphy: add S6QuarterRateDDRPHY to run DDR3 at higher frequencies. 2015-08-22 12:17:48 +02:00
simphy.py sdram/phy: fix simphy memory usage 2015-06-02 19:33:09 +02:00