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cpu
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soc: allow creating SoC without BIOS.
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2020-03-06 20:05:27 +01:00 |
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__init__.py
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litex: reorganize things, first work working version
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2015-11-07 17:48:55 +01:00 |
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bitbang.py
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soc/cores/bitbang: fix missing self.comb on miso.
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2020-02-25 15:57:14 +01:00 |
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clock.py
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soc/cores/clock: make sure specific clkoutn_divide_range is only used as a fallback solution.
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2020-03-16 11:44:39 +01:00 |
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code_8b10b.py
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cores/8b10b: use real Memory for 6b5b table (to improve timings on ECP5)
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2019-12-09 19:25:38 +01:00 |
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dna.py
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cores/dna: cleanup and add add_timing_constraints method
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2020-01-21 14:08:17 +01:00 |
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ecc.py
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soc/cores/ecc: improve readibility, uniformize with others cores
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2019-09-29 16:02:04 +02:00 |
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freqmeter.py
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soc/cores: rename frequency_meter to freqmeter and uniformize with others cores
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2019-09-29 16:08:39 +02:00 |
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gpio.py
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cores/gpio: add CSR descriptions.
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2020-03-11 12:06:15 +01:00 |
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hyperbus.py
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soc/core: simplify/cleanup HyperRAM core
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2019-08-16 14:04:58 +02:00 |
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i2s.py
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soc/cores/i2s: fix rst parsing errors
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2020-03-10 20:37:55 +08:00 |
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icap.py
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cores/icap: add CSR descriptions.
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2020-03-11 11:04:42 +01:00 |
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identifier.py
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soc/cores: uniformize (continue)
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2019-09-29 17:04:21 +02:00 |
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jtag.py
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soc/cores/jtag: add Xilinx JTAG TAPs support and simple JTAG PHY (can be used for JTAG UART)
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2019-09-06 11:55:41 +02:00 |
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prbs.py
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soc/cores: uniformize (continue)
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2019-09-29 17:04:21 +02:00 |
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pwm.py
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cores/pwm: add CSR descriptions.
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2020-03-11 10:38:28 +01:00 |
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spi.py
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soc/core/spi: add Clk Divider CSR (defaults to sys_clk_freq/spi_clk_freq).
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2020-03-20 19:49:42 +01:00 |
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spi_flash.py
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Merge pull request #337 from gregdavill/spi-flash
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2020-01-09 13:24:17 +01:00 |
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spi_opi.py
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soc/cores/spi_opi: documentation fixes
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2020-03-10 20:40:04 +08:00 |
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timer.py
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cores: timer: clean up wording for timer documentation
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2020-01-02 16:24:12 +08:00 |
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uart.py
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cores/uart: cleanup
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2020-02-28 22:12:05 +01:00 |
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up5kspram.py
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cores/up5ksram: optimize bus.adr decoding
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2019-07-22 07:55:47 +02:00 |
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usb_fifo.py
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soc/cores: uniformize (continue)
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2019-09-29 17:04:21 +02:00 |
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xadc.py
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cores/xadc: add CSR descriptions.
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2020-03-11 10:05:14 +01:00 |
