Unai Martinez-Corral
|
7dfaaad5c5
|
docs/getting: update heading levels; rename file to 'getting.rst'
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
|
2022-02-23 00:03:23 +01:00 |
Karol Gugala
|
f0c5adcb75
|
Raname to F4PGA
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
|
2022-02-18 18:15:44 +01:00 |
Joshua Fife
|
4a818ebf9a
|
fixed documentation and makefiles. Renamed common makefile.
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-11-11 13:47:47 -07:00 |
|
Joshua Fife
|
6947f53eb7
|
finished updating makefile instructions and modified makeifle names
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-11-11 13:47:47 -07:00 |
|
Joshua Fife
|
23ef2d56a2
|
Fixed a few grammar errors and made things a little clearer
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-07-05 16:37:40 -06:00 |
|
Joshua Fife
|
ce5b57240d
|
Fixed several minor errors and made documentation more concise
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-07-05 14:54:44 -06:00 |
|
Joshua Fife
|
d5c2ee1938
|
Resolved minor errors and added instructions for constraints
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-07-02 15:50:12 -06:00 |
|
Joshua Fife
|
62850aaa99
|
Added explanation of symbiflow commands
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-07-02 12:08:32 -06:00 |
|
Joshua Fife
|
b8a300db26
|
Changed some formatting, made naming consistent, and clarified info on SystemVerilog
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-30 09:21:21 -06:00 |
|
Joshua Fife
|
c3f494d7fc
|
Made instructions clearer and added some information on the ifeq/else ifeq blocks
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-25 18:26:22 -06:00 |
|
Joshua Fife
|
f3115cbe40
|
Changes rough draft
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-25 16:23:44 -06:00 |
Brent Nelson
|
ddb9fe4b42
|
Added term symbiflow-examples in place of symbiflow in a couple of places
Signed-off-by: Brent Nelson <nelson@ee.byu.edu>
|
2021-06-23 13:51:42 -06:00 |
|
Joshua Fife
|
46a7ce1fc7
|
Revised draft for Personal Designs
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-19 19:40:16 -06:00 |
|
Joshua Fife
|
c451dae1ac
|
Added extra XDC PCF SDC info
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-15 17:16:03 -06:00 |
|
Joshua Fife
|
b6932ed300
|
Rough Makefile Instructions
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-08 20:48:25 -06:00 |
|
Joshua Fife
|
1cafeeff8d
|
Added instructions for Makefile
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-08 17:59:33 -06:00 |
|
Joshua Fife
|
52ba45644e
|
Rough Draft
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
|
2021-06-08 12:42:12 -06:00 |