Unai Martinez-Corral
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b2c7c587fb
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docs: s/INSTALL_DIR/F4PGA_INSTALL_DIR/
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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2022-05-26 16:05:59 +02:00 |
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Unai Martinez-Corral
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7dfaaad5c5
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docs/getting: update heading levels; rename file to 'getting.rst'
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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2022-02-23 00:03:23 +01:00 |
Karol Gugala
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f0c5adcb75
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Raname to F4PGA
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
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2022-02-18 18:15:44 +01:00 |
Joshua Fife
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4a818ebf9a
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fixed documentation and makefiles. Renamed common makefile.
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-11-11 13:47:47 -07:00 |
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Joshua Fife
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6947f53eb7
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finished updating makefile instructions and modified makeifle names
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-11-11 13:47:47 -07:00 |
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Joshua Fife
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23ef2d56a2
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Fixed a few grammar errors and made things a little clearer
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-07-05 16:37:40 -06:00 |
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Joshua Fife
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ce5b57240d
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Fixed several minor errors and made documentation more concise
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-07-05 14:54:44 -06:00 |
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Joshua Fife
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d5c2ee1938
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Resolved minor errors and added instructions for constraints
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-07-02 15:50:12 -06:00 |
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Joshua Fife
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62850aaa99
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Added explanation of symbiflow commands
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-07-02 12:08:32 -06:00 |
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Joshua Fife
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b8a300db26
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Changed some formatting, made naming consistent, and clarified info on SystemVerilog
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-30 09:21:21 -06:00 |
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Joshua Fife
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c3f494d7fc
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Made instructions clearer and added some information on the ifeq/else ifeq blocks
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-25 18:26:22 -06:00 |
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Joshua Fife
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f3115cbe40
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Changes rough draft
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-25 16:23:44 -06:00 |
Brent Nelson
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ddb9fe4b42
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Added term symbiflow-examples in place of symbiflow in a couple of places
Signed-off-by: Brent Nelson <nelson@ee.byu.edu>
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2021-06-23 13:51:42 -06:00 |
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Joshua Fife
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46a7ce1fc7
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Revised draft for Personal Designs
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-19 19:40:16 -06:00 |
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Joshua Fife
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c451dae1ac
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Added extra XDC PCF SDC info
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-15 17:16:03 -06:00 |
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Joshua Fife
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b6932ed300
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Rough Makefile Instructions
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-08 20:48:25 -06:00 |
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Joshua Fife
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1cafeeff8d
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Added instructions for Makefile
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-08 17:59:33 -06:00 |
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Joshua Fife
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52ba45644e
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Rough Draft
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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2021-06-08 12:42:12 -06:00 |