Florent Kermarrec
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df5f555842
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bench: Update with recent changes.
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2021-03-12 10:25:11 +01:00 |
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Florent Kermarrec
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c29c898af4
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platforms/targets: switch to LiteX-Boards.
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2021-01-04 14:11:32 +01:00 |
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Florent Kermarrec
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a87c468afa
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bench: use --sys-clk-freq=xy to reconfigure frequency and fix Ultrascale.
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2020-12-10 19:06:19 +01:00 |
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Florent Kermarrec
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75f87538a5
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bench: use common load_bios function.
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2020-12-10 11:21:21 +01:00 |
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Florent Kermarrec
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ea63480253
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bench/targets: add identifier.
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2020-12-10 11:12:45 +01:00 |
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Florent Kermarrec
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c472499131
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bench/targets: add optional analyzer on all test targets.
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2020-12-10 08:44:35 +01:00 |
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Florent Kermarrec
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c83e10dafe
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bench: cleanup clocking on Ultrascale targets.
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2020-11-06 16:14:22 +01:00 |
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Florent Kermarrec
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5cfdf77654
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bench/targets: simplify BIST integration using new add_sdram with_bist parameter.
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2020-11-06 10:34:26 +01:00 |
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Florent Kermarrec
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a95c6883cc
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bench/targets: uniformize.
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2020-10-29 18:58:37 +01:00 |
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Florent Kermarrec
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06544c6547
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bench: uniformize targets with 125MHz clock and Etherbone.
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2020-09-24 13:03:07 +02:00 |
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Florent Kermarrec
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7d0dac78c5
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bench/kcu105: add a second pll to reduce frequency steps.
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2020-08-28 19:03:44 +02:00 |
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Florent Kermarrec
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1fb78fa558
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bench: cleanup, do more testing on 7-series.
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2020-08-28 17:57:59 +02:00 |
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Florent Kermarrec
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248c5de517
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bench: switch to UARTBone to simplify (and to allow testing boards without ethernet capability) and improve test.
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2020-08-28 03:47:49 +02:00 |
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Florent Kermarrec
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d3502e6a9b
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bench: add common.py with common bench test code.
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2020-08-27 19:05:05 +02:00 |
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Florent Kermarrec
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2e3e19e9d4
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bench: simplify/improve, working on arty/genesys2.
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2020-08-27 18:41:54 +02:00 |
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Florent Kermarrec
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5c69da5d6d
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bench: add initial kcu105 bench target.
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2020-08-24 21:56:11 +02:00 |