Florent Kermarrec
5d1a9847aa
core: add LiteDRAMCore (ControllerInjector from LiteX)
2019-09-29 14:42:41 +02:00
Florent Kermarrec
d647abd026
gen: fix with_wishbone
2019-09-23 15:54:53 +02:00
Florent Kermarrec
db97203877
gen: use SoCCore with_wishbone parameter, do more replace in yml files before passing config to LiteDRAMCore
2019-09-23 12:55:14 +02:00
Florent Kermarrec
adf481f1d5
gen: disable peripherals that are not used when cpu_type is None
2019-09-23 10:16:47 +02:00
Florent Kermarrec
233191939e
gen: change CSR config names, switch to csr_expose/csr_align
2019-09-23 09:12:40 +02:00
Florent Kermarrec
da408a3982
gen: fix default csr_port_align value
2019-09-23 09:05:54 +02:00
Benjamin Herrenschmidt
bac66aa08f
gen: In conjunction with the corresponding changes in litex itself, this will allow us to generate a more useful standalone litedram core.
...
The CSR alignment and base can be specified (which mostly affects
the generation of csr.h) andwe stop trying to copy the init code
that we haven't generated
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2019-09-23 08:58:16 +02:00
Benjamin Herrenschmidt
afbf709767
We had the address and data bus sizes mixed up
...
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2019-09-23 08:51:04 +02:00
Florent Kermarrec
d93dded624
frontend/wishbone: add data_width assertions
2019-09-18 21:12:23 +02:00
Florent Kermarrec
f586aada1c
phys: improve presentation (add separators, better indent)
2019-09-11 09:50:46 +02:00
Florent Kermarrec
783258c97f
phys: use dfi instead if self.dfi internally
2019-09-11 09:00:36 +02:00
Florent Kermarrec
59c1289432
phy/usddrphy: move DDR4DFIMux to dfi.py
2019-09-11 08:57:58 +02:00
Florent Kermarrec
f861d99903
core/refresher: improve naming/parameters of refresh postponing
2019-09-11 08:38:22 +02:00
Florent Kermarrec
dc1bb53a88
phys: move get_cl_cw/get_sys_latency/get_sys_phases helpers to common
2019-09-11 08:00:54 +02:00
Florent Kermarrec
509f60652a
README: add periodic refresh/ZQ short calibration.
2019-09-09 18:05:17 +02:00
Florent Kermarrec
40b4c62889
test/test_init: fix
2019-09-09 15:17:43 +02:00
Florent Kermarrec
5b48eb278a
test/test_init: delete generated file
2019-09-09 15:08:01 +02:00
Florent Kermarrec
188b6a8feb
add ZQ periodic short calibration support (default to 1s)
2019-09-09 15:07:38 +02:00
Florent Kermarrec
6e176d40ac
init: split by memtype
2019-09-09 12:10:48 +02:00
Florent Kermarrec
0b24b817e3
test: add test_init with sdr/ddr3/ddr4 references
2019-09-09 11:45:10 +02:00
Florent Kermarrec
bf5883cd43
rename sdram_init to init
2019-09-09 11:42:02 +02:00
Florent Kermarrec
23ccdc9c0c
modules: add DDR3 MT8KTF51264 SO-DIMM
2019-09-09 08:47:29 +02:00
Florent Kermarrec
d37a30e0d7
litedram_gen: add wishbone user port support
2019-09-03 23:47:08 +02:00
Florent Kermarrec
b6a0eff2d9
frontend/wishbone: split control/data paths (to avoid data muxes)
2019-09-03 12:44:07 +02:00
Florent Kermarrec
6497343fc0
frontend/wishbone: remove IDLE fsm state
2019-09-03 12:37:31 +02:00
Florent Kermarrec
00ecb871c4
gen: add separators
2019-09-03 12:37:05 +02:00
Florent Kermarrec
a782eb5aa8
test/test_examples: adapt for travis
2019-08-31 14:55:14 +02:00
Florent Kermarrec
f678efa02b
travis: add pyyaml
2019-08-29 12:13:05 +02:00
enjoy-digital
8861d8058a
Merge pull request #91 from sd-fritze/master
...
modules: Add support for Micron MT47H32M16 DDR2 RAM
2019-08-31 13:59:40 +02:00
gruetzkopf
fe2cc948dc
modules: Add support for Micron MT47H32M16 DDR2 RAM
2019-08-31 12:05:07 +02:00
Florent Kermarrec
a23b9e7877
core/refresher: set cmd.valid to 0 when sequencer done
2019-08-30 08:55:38 +02:00
Florent Kermarrec
12ddc135be
litedram/gen: add description and switch to argparse
2019-08-28 08:07:20 +02:00
Florent Kermarrec
2bdeda021b
move standalone core generation to litedram package and make it usable externally
...
When LiteDRAM is installed, standalone core can now be generated with "litedram_gen config.yml"
2019-08-28 07:19:30 +02:00
Florent Kermarrec
0dde125740
examples/litedram_gen: fix #!/usr/bin/env python3 location
2019-08-28 07:09:58 +02:00
Florent Kermarrec
602ff8be81
examples: switch to YAML config files
2019-08-28 07:08:10 +02:00
Florent Kermarrec
fb28f791c8
core/refresher: remove load/load_count on RefreshTimer (not used)
2019-08-16 08:52:36 +02:00
Florent Kermarrec
1c69f49760
core/controller: allow user provided Refresher
2019-08-16 08:39:08 +02:00
Florent Kermarrec
b64daba711
core/controller: add separators, ease readibility
2019-08-16 08:37:08 +02:00
Florent Kermarrec
338d18dba0
core/refresher: add capability to accumulate N refreshs and execute the N refreshs together
...
Being able to accumulate refreshs allow reducing the number of interruptions to the Controller from 1 every tREFI cycles to 1 every N*tREFI cycles.
2019-08-14 09:57:24 +02:00
Florent Kermarrec
818c4ca9db
core/refresher: another cleanup pass
2019-08-14 09:07:49 +02:00
Florent Kermarrec
80c8ecf477
core/multiplexer: rewrite arbiter comment
2019-08-14 08:59:49 +02:00
Florent Kermarrec
37db41648e
core/refresher: another cleanup pass
2019-08-14 08:50:34 +02:00
Florent Kermarrec
f0592ff89f
core/refresher: add comments
2019-08-14 08:30:25 +02:00
Florent Kermarrec
de38b52eb6
core/refresher: rename RefreshGenerator to RefreshSequencer and simplify
2019-08-14 08:08:30 +02:00
Florent Kermarrec
8573c22cc1
phy/gensdrphy: add assertions on length of pads.dq/pads.dq
...
Allow detecting platform file issues similar to #88 , #89 earlier.
2019-08-04 15:06:34 +02:00
Florent Kermarrec
6c53996a70
core/refresher: reduce refresh period by one cycle
2019-07-24 08:18:04 +02:00
Florent Kermarrec
afb6d0a15e
core/refresher: reduce RefreshGenerator start delay by 1 cycle
2019-07-24 08:01:54 +02:00
Florent Kermarrec
b543286d06
test/test_refresh: add Refresher test
2019-07-23 22:31:27 +02:00
Florent Kermarrec
7daf3551f6
test/test_bist: remove vcd generation (only useful for debug)
2019-07-23 21:46:03 +02:00
Florent Kermarrec
b4125fa50f
test/test_refresh: add RefreshTimer test
2019-07-23 21:44:09 +02:00
