Florent Kermarrec
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40b99ecc05
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test: use new RemoteClient import
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2018-09-23 10:28:50 +02:00 |
Florent Kermarrec
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c370e9f71f
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phy/model: remove creation/deletion of ethernet tap (now handled by the simulator)
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2018-09-20 22:49:37 +02:00 |
Florent Kermarrec
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3d868449e9
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core/mac/sram: fix code refactoring
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2018-09-17 09:10:59 +02:00 |
Florent Kermarrec
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5106bcdc0c
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core/mac/sram: simplify last_be code
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2018-09-07 21:14:17 +02:00 |
Florent Kermarrec
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ce72e34f56
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core/mac: pass endianness and use if for last_be gen/check
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2018-09-07 10:35:27 +02:00 |
Florent Kermarrec
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94af3d63d9
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README: update and rename example_designs to examples
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2018-08-31 08:26:37 +02:00 |
Florent Kermarrec
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24b0d2b8c2
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setup.py: fix exclude, add example_designs to exclude
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2018-07-19 11:23:52 +02:00 |
Florent Kermarrec
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4edba99b38
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phy: remove s6rgmii (not working correctly).
Alternative is to create a wrapper around the rgmii_if from Xilinx as it's done in opsis-soc
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2018-07-18 10:09:01 +02:00 |
Florent Kermarrec
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6b872fd271
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setup.py: exclude sim, test, doc directories
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2018-07-18 09:40:20 +02:00 |
Florent Kermarrec
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40d91f09c4
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phy: use rx_dv instead of dv
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2018-07-05 10:48:17 +02:00 |
Florent Kermarrec
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ba2fdc532d
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README: add 1000BaseX phy
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2018-06-29 14:47:22 +02:00 |
Florent Kermarrec
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a2dbdd6d2b
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phy: add a7_1000basex phy (from misoc)
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2018-06-29 14:26:19 +02:00 |
Florent Kermarrec
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95849a0fed
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core/icmp: use buffered=True on buffer to allow tools to use block rams
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2018-05-27 07:41:32 +02:00 |
Florent Kermarrec
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33afda74f7
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README: add migen dependency
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2018-03-01 10:43:30 +01:00 |
Florent Kermarrec
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79a6ba7709
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replace litex.gen imports with migen imports
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2018-02-23 13:40:09 +01:00 |
Florent Kermarrec
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c15f089eba
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bump to 0.2.dev
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2018-02-23 13:39:53 +01:00 |
Florent Kermarrec
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c42aa09878
|
uniformize litex cores
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2018-02-22 10:12:33 +01:00 |
enjoy-digital
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4e08d6e9f9
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Merge pull request #13 from felixheld/crc_pythonize
pythonize CRC calculation
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2018-02-22 09:00:25 +01:00 |
Felix Held
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9dcc7bc65e
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mac/crc.py: make crc calculation more pythonic
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2018-02-21 23:20:03 +01:00 |
Felix Held
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2ceaa74caf
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clarify the comments in mac/crc.py code
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2018-02-21 23:05:32 +01:00 |
Tim Ansell
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8fc7161036
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Merge pull request #11 from felixheld/indentation-fixes
Fix all remaining indentation issues in python code
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2018-01-13 13:36:32 +11:00 |
Felix Held
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20af2bf201
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Fix all remaining indentation issues in python code
I ran a script that shouldn't have missed any tab in the python source files.
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2018-01-13 13:23:18 +11:00 |
Florent Kermarrec
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2788294834
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core/mac/sram: add csr for fifo level of sram reader (for the linux driver)
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2017-12-31 07:12:55 +01:00 |
Florent Kermarrec
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c9ec30df2f
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core/mac: apply changes from misoc: remove gap_checker in rx, add preamble errors, fix preamble checker
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2017-12-30 18:32:50 +01:00 |
Florent Kermarrec
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ccdb85bcb7
|
doc: add simple architecture diagram
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2017-11-13 17:39:09 +01:00 |
Florent Kermarrec
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edb51944d5
|
Merge branch 'master' of https://github.com/enjoy-digital/liteeth
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2017-11-06 19:02:42 +01:00 |
Florent Kermarrec
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a20ff49c90
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example_designs/test: keep up to date with litescope
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2017-11-06 19:01:51 +01:00 |
Florent Kermarrec
|
26c01a1627
|
core/mac/crc: fix crc_error generation
|
2017-11-01 23:23:02 +01:00 |
Florent Kermarrec
|
eaf4acc3f5
|
core/mac: apply misoc changes (72faa2c)
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2017-11-01 21:11:08 +01:00 |
Florent Kermarrec
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937c240727
|
test: fix test_model
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2017-09-25 13:12:30 +02:00 |
enjoy-digital
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48fb4647bd
|
Merge pull request #6 from enjoy-digital/port-1234
Adding TCP port 1234 to Etherbone dissector.
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2017-09-01 15:23:22 +02:00 |
Tim Ansell
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00e6ded2e9
|
Adding TCP port 1234 to Etherbone dissector.
LiteEth designs seem to commonly use TCP port 1234.
|
2017-09-01 23:16:09 +10:00 |
Florent Kermarrec
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c43fb269a7
|
frontend/etherbone: timing optimizations
|
2017-07-19 12:20:17 +02:00 |
Florent Kermarrec
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042d3aee3e
|
frontend/etherbone: fix cd="sys case
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2017-07-15 22:10:48 +02:00 |
Florent Kermarrec
|
1127e3a615
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core/udp: simplify LiteEthUDPCrossbar.get_port when used with cdc
|
2017-07-01 13:14:13 +02:00 |
Florent Kermarrec
|
b870d13d96
|
global: reset_less optimizations
|
2017-07-01 11:22:26 +02:00 |
Florent Kermarrec
|
34460cec47
|
core/udp: add cdc support (untested)
|
2017-06-30 11:01:44 +02:00 |
Florent Kermarrec
|
5bc6e879ae
|
update litescope
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2017-06-23 09:14:19 +02:00 |
Florent Kermarrec
|
ad9ecdbd5e
|
use udp port 1234 for etherbone
|
2017-06-22 11:28:45 +02:00 |
Florent Kermarrec
|
e68e2ed73c
|
frontend/etherbone: add description
|
2017-04-26 23:43:43 +02:00 |
Florent Kermarrec
|
f6d8ddbba0
|
update litex uart
|
2017-04-19 10:39:52 +02:00 |
Florent Kermarrec
|
62acb5df52
|
example_designs: update
|
2017-03-30 14:46:54 +02:00 |
Florent Kermarrec
|
42454a5448
|
frontend/etherbone: add wishbone slave support (allow extending wishbone bridge over ethernet between boards)
|
2017-03-30 14:46:30 +02:00 |
Florent Kermarrec
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a067691222
|
README: update
|
2017-01-19 14:53:11 +01:00 |
Florent Kermarrec
|
c4856d1eb5
|
test: start converting to python unittest
|
2017-01-19 14:33:24 +01:00 |
Florent Kermarrec
|
e1da2df97d
|
core/mac/sram: fix reception of frames larger than mtu
-use 32bits length CSR (allow software to detect frames larger than mtu)
-drop remaining bytes larger than mtu
|
2016-05-01 07:37:24 +02:00 |
Florent Kermarrec
|
072969ff58
|
common: fix eth_mtu (1530 bytes)
|
2016-05-01 07:09:37 +02:00 |
Florent Kermarrec
|
94290016d0
|
setup.py: fix version (0.1)
|
2016-04-29 14:32:05 +02:00 |
Florent Kermarrec
|
33e36dc4d7
|
use new Record.connect omit parameter (replace leave_out)
|
2016-04-21 08:03:31 +02:00 |
enjoy-digital
|
8590310783
|
Merge pull request #2 from mithro/master
Adding a .gitignore file.
|
2016-04-19 06:07:22 +02:00 |