Commit Graph

106 Commits

Author SHA1 Message Date
Florent Kermarrec 2f625c58b2 update litex uart 2017-04-19 10:46:17 +02:00
Florent Kermarrec f2d63aa1f3 test/test_analyzer: add TODO 2017-01-19 05:30:40 +01:00
Florent Kermarrec a80d890fb9 test/test_dump: cleanup 2017-01-19 05:30:25 +01:00
Florent Kermarrec 687d09f331 README: update 2017-01-19 04:58:40 +01:00
Florent Kermarrec 795d70011b test: use csr write/read functions and switch to python unittest 2017-01-19 04:58:04 +01:00
Florent Kermarrec 238e5ffcc2 setup.py: +x and add testsuite 2017-01-19 04:43:40 +01:00
enjoy-digital e3e7ae0a79 Merge pull request #1 from mithro/records
Support Record objects.
2016-12-14 17:38:38 +01:00
enjoy-digital 5ecb07ead3 Merge pull request #2 from mithro/gitignore
Adding a .gitignore
2016-12-14 17:38:12 +01:00
Tim 'mithro' Ansell 8b706ce05d Merge remote-tracking branch 'python-ignore/master' into gitignore 2016-12-14 17:15:29 +01:00
Tim Ansell 13dad5a522 GitHub's default .gitignore for Python. 2016-12-14 17:11:37 +01:00
Tim 'mithro' Ansell 9f829fe608 Support Record objects. 2016-12-14 16:57:32 +01:00
Florent Kermarrec edbcf65f6f software: some clean up and generate clk in dump 2016-06-13 17:07:56 +02:00
Florent Kermarrec b989ad6ce2 setup.py: fix version (0.1) 2016-04-29 14:41:47 +02:00
Florent Kermarrec 2877ead735 core: remove rounding to next ceil_pow2 (not useful) 2016-04-25 19:16:14 +02:00
Florent Kermarrec 9eb97d7879 core/FrontendTrigger: remove (and wrong) dw computation 2016-04-25 15:51:48 +02:00
Florent Kermarrec b74bcb2fbf use new Record.connect omit parameter (replace leave_out) 2016-04-21 08:06:24 +02:00
Florent Kermarrec f8e3e63ef3 fix cd_ratio support 2016-04-03 22:58:12 +02:00
Florent Kermarrec 0c41c6a204 core: minor fixes 2016-04-03 18:26:50 +02:00
Florent Kermarrec 0f7f384ac9 test: +x on scripts 2016-04-03 17:30:58 +02:00
Florent Kermarrec 2539dce96f test/analyzer_tb: retrieve and print data 2016-04-01 09:12:36 +02:00
Florent Kermarrec b1b9e61ecf gateware: complete refactoring (only keep essential features, now less than 200 LOCs :)
use new LiteX features and only keep one trigger, subsampler, cdc, converter and storage modules.

software still needs to be cleaned up.
2016-03-31 21:41:51 +02:00
Florent Kermarrec e211d17ca6 README: we are in 2016 2016-03-31 00:07:27 +02:00
Florent Kermarrec 4f03da20ab frontend/logic_analyzer: add Converter for the cases where clk_domain frequency > system frequency 2016-03-30 20:22:42 +02:00
Florent Kermarrec 97a0785e28 common: remove direction in layout 2016-03-30 20:21:21 +02:00
Florent Kermarrec 58a09bbdd6 test: remove __init__.py and use setup.py develop 2016-03-22 10:38:17 +01:00
Florent Kermarrec 8f88088f63 global: use valid/ready/last signals instead of stb/ack/eop (similar to AXI) 2016-03-16 20:10:09 +01:00
Florent Kermarrec 7af786e47e example_designs: use new Vivado special overrides 2016-03-16 19:48:38 +01:00
Florent Kermarrec 6d975fe388 global: replace Sink/Source with stream.Endpoint 2016-03-15 21:01:20 +01:00
Florent Kermarrec 88c4e2d126 software/driver/logic_analyzer: fix case when config_csv is provided as a parameter 2016-01-11 19:09:48 +01:00
Florent Kermarrec 83e06cad80 example_designs: change the way we build cores (ensure consistent IO naming) 2015-12-27 15:42:37 +01:00
Florent Kermarrec 378272d9e2 some fixes (from refactoring) 2015-12-27 13:14:53 +01:00
Florent Kermarrec 4bdd6813ef remove use of Record.connect 2015-12-27 12:51:19 +01:00
Florent Kermarrec 8e7d89fc0c setup.py: exclude test directory 2015-12-19 21:04:25 +01:00
Florent Kermarrec 21b76a1860 example_designs/make.py: do not use "-" in build_name 2015-12-12 16:51:35 +01:00
Florent Kermarrec d0b4688184 remove Counter module 2015-11-24 21:50:01 +01:00
Florent Kermarrec 7b8169d8d2 example_designs/test: fix test_logic_analyzer import 2015-11-24 15:10:03 +01:00
Florent Kermarrec 92c7af04db example_designs/targets/core: use new Pins from LiteX (allow int parameters) 2015-11-19 15:00:18 +01:00
Florent Kermarrec 577d83dc80 test: use new RemoteClient/RemoveServer provided by LiteX 2015-11-17 00:23:51 +01:00
Florent Kermarrec 198babae69 stream/SyncFIFO now exposes fifo level 2015-11-16 16:13:01 +01:00
Florent Kermarrec 553d7c5669 update setup.py 2015-11-14 17:31:14 +01:00
Florent Kermarrec c4fcd17cce doc: remove skeleton and change logo (we'll add a better doc later) 2015-11-14 01:13:01 +01:00
Florent Kermarrec 69ee0b76c0 README: update 2015-11-13 23:55:12 +01:00
Florent Kermarrec 24ef9d7ebe for now use our fork of migen 2015-11-13 15:46:08 +01:00
Florent Kermarrec 947d974d0a start adapting to new migen/litex 2015-11-12 01:04:28 +01:00
Florent Kermarrec ce39265c0c use our own migen/misoc fork for now since migen/misoc is evolving 2015-11-04 10:10:12 +01:00
Florent Kermarrec edbdf1a864 README: update 2015-10-24 14:13:31 +02:00
Florent Kermarrec 9cc05dfe33 example_designs/test/test_logic_analyzer: replace la with logic_analyzer 2015-09-27 19:26:22 +02:00
Florent Kermarrec 19140a853b example_designs/test/Makefile: add clean 2015-09-27 19:24:38 +02:00
Florent Kermarrec 7623739f5a change names of frontend modules: io --> inout, la--> logic_analyzer 2015-09-27 18:47:30 +02:00
Florent Kermarrec c436e160b6 example_designs/test: add Makefile and test on de0nano 2015-09-27 18:16:10 +02:00