Florent Kermarrec
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d5887a3eb0
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example_designs: keep up to date with litex
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2017-09-25 12:54:25 +02:00 |
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Florent Kermarrec
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d4d63d7474
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software/driver/analyzer: fix groups build
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2017-07-24 22:57:19 +02:00 |
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Florent Kermarrec
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8d87992b95
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litescope/software/dump/sigrok: remove 8 bits limitation and some cleanup
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2017-06-23 11:40:44 +02:00 |
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Florent Kermarrec
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d8649fca5f
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software/dump/sigrok: add limitation to 8 bits, will be fixed later
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2017-06-23 10:50:08 +02:00 |
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Florent Kermarrec
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2048acf80e
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software/dump/sigrok: fix write_data, now working :)
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2017-06-23 08:57:10 +02:00 |
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Florent Kermarrec
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3d35e72a48
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software/driver/analyzer: fix wait_done
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2017-06-22 19:24:08 +02:00 |
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Florent Kermarrec
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dff7ac8d4e
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software/dump/sigrok: rename capture file to dump
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2017-06-22 19:20:34 +02:00 |
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Florent Kermarrec
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b57a5f9369
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example_design: demonstrate how to use groups, create separate capture for vcd (bus support) and sigrok (no bus support)
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2017-06-22 19:12:33 +02:00 |
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Florent Kermarrec
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92710208de
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software/driver/analyzer: add wait_done method
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2017-06-22 19:11:11 +02:00 |
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Florent Kermarrec
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0c4d0f4505
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software/dump/sigrok: fix samplerate generation (2x since we are doubling data to show capture clk)
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2017-06-22 18:45:15 +02:00 |
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Florent Kermarrec
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f8ea15363c
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software/dump/common: rename clk to capture_clk in dumps
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2017-06-22 18:41:08 +02:00 |
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Florent Kermarrec
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49c524d866
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software/driver: remove samplerate handling and simply pass it when writing dump if wanted
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2017-06-22 18:37:54 +02:00 |
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Florent Kermarrec
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9e669dce7f
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software/driver/analyzer: add upload progress bar and improve presentation
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2017-06-22 18:19:44 +02:00 |
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Florent Kermarrec
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1f33e44ad5
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software/driver/io: cleanup
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2017-06-22 18:13:07 +02:00 |
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Florent Kermarrec
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01eabb2d0d
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example_design: update with litex and fix
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2017-06-22 17:58:19 +02:00 |
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Florent Kermarrec
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e2cb7bd829
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README: consistency between projects
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2017-06-22 17:00:16 +02:00 |
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Florent Kermarrec
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cf7ea12ec8
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litescope: add support for groups of signals and dynamic muxing between them
allow multiple debug configuration in a single bitstream
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2017-06-09 12:14:00 +02:00 |
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Florent Kermarrec
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2f625c58b2
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update litex uart
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2017-04-19 10:46:17 +02:00 |
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Florent Kermarrec
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f2d63aa1f3
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test/test_analyzer: add TODO
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2017-01-19 05:30:40 +01:00 |
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Florent Kermarrec
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a80d890fb9
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test/test_dump: cleanup
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2017-01-19 05:30:25 +01:00 |
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Florent Kermarrec
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687d09f331
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README: update
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2017-01-19 04:58:40 +01:00 |
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Florent Kermarrec
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795d70011b
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test: use csr write/read functions and switch to python unittest
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2017-01-19 04:58:04 +01:00 |
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Florent Kermarrec
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238e5ffcc2
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setup.py: +x and add testsuite
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2017-01-19 04:43:40 +01:00 |
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enjoy-digital
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e3e7ae0a79
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Merge pull request #1 from mithro/records
Support Record objects.
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2016-12-14 17:38:38 +01:00 |
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enjoy-digital
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5ecb07ead3
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Merge pull request #2 from mithro/gitignore
Adding a .gitignore
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2016-12-14 17:38:12 +01:00 |
Tim 'mithro' Ansell
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8b706ce05d
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Merge remote-tracking branch 'python-ignore/master' into gitignore
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2016-12-14 17:15:29 +01:00 |
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Tim Ansell
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13dad5a522
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GitHub's default .gitignore for Python.
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2016-12-14 17:11:37 +01:00 |
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Tim 'mithro' Ansell
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9f829fe608
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Support Record objects.
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2016-12-14 16:57:32 +01:00 |
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Florent Kermarrec
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edbcf65f6f
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software: some clean up and generate clk in dump
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2016-06-13 17:07:56 +02:00 |
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Florent Kermarrec
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b989ad6ce2
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setup.py: fix version (0.1)
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2016-04-29 14:41:47 +02:00 |
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Florent Kermarrec
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2877ead735
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core: remove rounding to next ceil_pow2 (not useful)
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2016-04-25 19:16:14 +02:00 |
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Florent Kermarrec
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9eb97d7879
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core/FrontendTrigger: remove (and wrong) dw computation
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2016-04-25 15:51:48 +02:00 |
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Florent Kermarrec
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b74bcb2fbf
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use new Record.connect omit parameter (replace leave_out)
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2016-04-21 08:06:24 +02:00 |
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Florent Kermarrec
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f8e3e63ef3
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fix cd_ratio support
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2016-04-03 22:58:12 +02:00 |
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Florent Kermarrec
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0c41c6a204
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core: minor fixes
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2016-04-03 18:26:50 +02:00 |
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Florent Kermarrec
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0f7f384ac9
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test: +x on scripts
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2016-04-03 17:30:58 +02:00 |
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Florent Kermarrec
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2539dce96f
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test/analyzer_tb: retrieve and print data
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2016-04-01 09:12:36 +02:00 |
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Florent Kermarrec
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b1b9e61ecf
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gateware: complete refactoring (only keep essential features, now less than 200 LOCs :)
use new LiteX features and only keep one trigger, subsampler, cdc, converter and storage modules.
software still needs to be cleaned up.
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2016-03-31 21:41:51 +02:00 |
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Florent Kermarrec
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e211d17ca6
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README: we are in 2016
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2016-03-31 00:07:27 +02:00 |
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Florent Kermarrec
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4f03da20ab
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frontend/logic_analyzer: add Converter for the cases where clk_domain frequency > system frequency
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2016-03-30 20:22:42 +02:00 |
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Florent Kermarrec
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97a0785e28
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common: remove direction in layout
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2016-03-30 20:21:21 +02:00 |
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Florent Kermarrec
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58a09bbdd6
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test: remove __init__.py and use setup.py develop
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2016-03-22 10:38:17 +01:00 |
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Florent Kermarrec
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8f88088f63
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global: use valid/ready/last signals instead of stb/ack/eop (similar to AXI)
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2016-03-16 20:10:09 +01:00 |
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Florent Kermarrec
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7af786e47e
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example_designs: use new Vivado special overrides
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2016-03-16 19:48:38 +01:00 |
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Florent Kermarrec
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6d975fe388
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global: replace Sink/Source with stream.Endpoint
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2016-03-15 21:01:20 +01:00 |
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Florent Kermarrec
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88c4e2d126
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software/driver/logic_analyzer: fix case when config_csv is provided as a parameter
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2016-01-11 19:09:48 +01:00 |
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Florent Kermarrec
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83e06cad80
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example_designs: change the way we build cores (ensure consistent IO naming)
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2015-12-27 15:42:37 +01:00 |
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Florent Kermarrec
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378272d9e2
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some fixes (from refactoring)
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2015-12-27 13:14:53 +01:00 |
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Florent Kermarrec
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4bdd6813ef
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remove use of Record.connect
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2015-12-27 12:51:19 +01:00 |
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Florent Kermarrec
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8e7d89fc0c
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setup.py: exclude test directory
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2015-12-19 21:04:25 +01:00 |