Ilia Sergachev
85397818d9
add Xilinx ZCU216 support
2022-02-21 19:14:13 +01:00
Florent Kermarrec
7d84e6e863
efinix_titanium_ti60_t225: Add SPI/Native SDCard support.
...
Both modes working with 8559b88ad8
.
2022-02-21 10:35:06 +01:00
Florent Kermarrec
df36cdbcc9
siglent_sds1104xe: Switch back to native DRAM width (now possible with Nax).
2022-02-18 11:47:08 +01:00
Florent Kermarrec
d85f88f42a
siglent_sds1104xe: Reduce DRAM's width to 16-bit for now (to use NaxRiscv).
2022-02-16 17:59:40 +01:00
Florent Kermarrec
08a79fa3ac
lattice_ecp5_vip: Minor cleanups, fix CI.
2022-02-15 10:58:38 +01:00
enjoy-digital
30afe26669
Merge pull request #348 from hubmartin/ecp5-vip
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Draft: Add Lattice ECP5 VIP board + HDMI output board support
2022-02-15 08:53:57 +01:00
enjoy-digital
896884dd21
Merge branch 'master' into axu2cga_software
2022-02-15 08:21:29 +01:00
enjoy-digital
6bbf8c8268
Merge pull request #351 from sergachev/litex_baseboard_openocd
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add openocd config for litex acorn baseboard
2022-02-15 08:11:41 +01:00
Florent Kermarrec
3f58df9974
platforms/targets: Fix typos.
2022-02-14 17:26:46 +01:00
Florent Kermarrec
b53b79821e
platforms: Expose toolchain parameter on all platforms to ease switching to alternative/open-source toolchains.
2022-02-14 11:35:18 +01:00
Florent Kermarrec
12b91eccdc
digilent_arty: Remove yosys+nextpnr INTERNAL_VREF constraint skip (now directly done in LiteX).
2022-02-14 10:45:29 +01:00
Ilia Sergachev
5cd1d7eaec
add openocd config for litex acorn baseboard
2022-02-13 16:44:40 +01:00
Gwenhael Goavec-Merou
5eca41ac73
targets/alinx_axu2cga: adding PS software support (inspired by xilinx_kv260)
2022-02-12 18:24:01 +01:00
Gwenhael Goavec-Merou
50654f1b7b
platforms/alinx_axu2cga: add zynqmp PS configuration params
2022-02-12 18:19:55 +01:00
Gwenhael Goavec-Merou
d672d9a9b1
targets: s/alinx_axu2gca/alinx_axu2cga/gc
2022-02-12 18:12:45 +01:00
hubmartin
c2cd4410df
Code cleanup, add copyright
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Signed-off-by: hubmartin <hub.martin@gmail.com>
2022-02-12 17:50:07 +01:00
Florent Kermarrec
c0e671919d
sqrl_acorn: Downgrade to SATA Gen1 for now (allow lower sys_clk_freq and enough for current tests).
2022-02-09 19:10:12 +01:00
Florent Kermarrec
d9b77c6f25
digilent_arty: Add --flash support.
2022-02-09 17:51:56 +01:00
Florent Kermarrec
4894926c40
xilinx_kv260: +x.
2022-02-09 16:01:51 +01:00
hubmartin
27b03df886
Add Lattice ECP5 VIP board + HDMI output board support
2022-02-08 21:47:58 +01:00
Sergiu Mosanu
450a26f395
Merge branch 'master' of https://github.com/litex-hub/litex-boards
2022-02-08 12:55:09 -05:00
Sergiu Mosanu
7ed633dc4b
add guideline for serial interface
2022-02-08 12:54:34 -05:00
Sergiu Mosanu
5a0f69502b
enable use of HBM for linux boot
2022-02-08 12:18:38 -05:00
Arusekk
5d52bc5461
Fix seven_seg pin assignment in DE1-SoC
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Fixes quartus build error:
```
Error (171016): Can't place node "seven_seg5[6]" -- illegal location assignment PIN_AA2 File: /home/arusekk/src/fpga-proj/build/de1soc/gateware/de1soc.v Line: 49
```
2022-02-08 09:03:53 +01:00
Florent Kermarrec
18e8bec9d4
xilinx/kv260: Minor cleanup and add Build/Use instructions (from PR).
2022-02-07 08:12:43 +01:00
enjoy-digital
8621700916
Merge pull request #345 from sergachev/feature/xilinx_kv260
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Add Xilinx KV260 support
2022-02-07 07:53:55 +01:00
Ilia Sergachev
1d8c3789af
add Xilinx KV260 support
2022-02-06 14:38:57 +01:00
Ben Stobbs
617fa26acd
Add 85F to help for orangecrab device
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The 85F orangecrab board exists, and works fine when this option is set to 85F, but leaving it out of the help is a bit confusing.
2022-02-06 10:36:58 +00:00
Florent Kermarrec
346623fd06
trellisboard: Rename Video I2C to videoi2c.
2022-02-04 09:26:31 +01:00
Florent Kermarrec
6d4fe82179
trellisboard: Rename hdmi_i2c to i2c (to have access to i2c_scan in the BIOS).
2022-02-02 11:08:21 +01:00
Florent Kermarrec
0522d8b0c5
trellisboard: Update i2c.add_init call.
2022-02-02 10:59:54 +01:00
Florent Kermarrec
7f4d464f1b
trellisboard: Add Video Terminal/Framebuffer support and use new I2C init feature to automatically configure TP410 at startup.
2022-02-02 09:52:12 +01:00
Florent Kermarrec
4251cfa865
terasic_de0nano: Add Build/Use instructions with JTAG-UART.
2022-02-01 15:58:34 +01:00
Florent Kermarrec
4d45611935
targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART.
2022-02-01 11:30:26 +01:00
enjoy-digital
9144cb44fb
Merge branch 'master' into jev/deca-eth
2022-01-31 16:22:58 +01:00
Jevin Sweval
fbd424fc48
DECA: Add Ethernet and Etherbone support
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Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
Jevin Sweval
9e5224ca49
Add JTAGbone support to Terasic DECA
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Along the way I added UARTbone support to DECA as well for debugging.
Examples:
./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover
./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00
Gwenhael Goavec-Merou
dd134a4b7d
digilent arty z7: allows toolchain selection (PL only)
2022-01-26 07:30:06 +01:00
Florent Kermarrec
74395ca80b
digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs).
2022-01-25 16:13:57 +01:00
Florent Kermarrec
624572f2e9
alinx_axu2gca: Review and do minor cosmetic changes.
2022-01-25 14:58:47 +01:00
Gwenhael Goavec-Merou
537f04a13d
alinx_axu2gca: new board
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Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2022-01-25 07:35:42 +01:00
Florent Kermarrec
621d45cd9e
digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code.
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sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
2022-01-24 19:16:07 +01:00
enjoy-digital
c2276c1e6d
Merge pull request #338 from suarezvictor/master
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Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 19:02:59 +01:00
Florent Kermarrec
1abb03e514
tang_nano_4k: Review/Cleanup:
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- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
- When constraining clk27, frequency is already in the name.
- In the target, we want to know we are using clk27 as the main clk.
- We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
2022-01-24 18:46:51 +01:00
enjoy-digital
e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu
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Enable LiteX BIOS on ARM core on Tang nano 4K
2022-01-24 18:36:10 +01:00
Florent Kermarrec
cc1b46f106
tang_nano_9k: Fix HyperRAM integration.
2022-01-24 18:35:12 +01:00
Victor Suarez Rovere
db77ea5c7a
Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 02:06:34 -03:00
Ilia Sergachev
f078e55bb1
tang nano 4k: fix removed default_clk_period, fix do_finalize signature
2022-01-23 16:47:20 +01:00
Ilia Sergachev
6238052b10
tang nano 4k: disable spi flash with gowin emcu, cleanup
2022-01-23 16:10:46 +01:00
Ilia Sergachev
6c81fc708c
tang nano 4k: add memory regions, set default cpu
2022-01-23 13:05:51 +01:00