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629 Commits 9 Branches 14 Tags 12 MiB
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629 Commits

Author SHA1 Message Date
Pepijn de Vos eba70377b7 add optional OLED peripheral to ULX3S target 2020-08-04 11:07:30 +02:00
Florent Kermarrec 929e55d7e6 platforms/trellisboard: add SDCard PMOD pins. 2020-07-29 09:07:55 +02:00
Florent Kermarrec 5fd3e8dbcd ecpix5: add SDCard. 
Validated with Linux-on-LiteX-VexRiscv.
 2020-07-28 17:45:49 +02:00
Florent Kermarrec f0581815f5 README: fix typo. 2020-07-28 17:44:30 +02:00
Florent Kermarrec 94ccf1dd3e targets/trellisboard: simplify clocking when no DDR3, remove firmware_ram (was here for debug). 2020-07-27 16:31:46 +02:00
Florent Kermarrec ecdc1ef7fd README: add missings . 2020-07-27 11:44:30 +02:00
Florent Kermarrec 361afa74b6 README: add links to LiteX's wiki. 2020-07-27 11:05:14 +02:00
Florent Kermarrec 02c0c0a1b1 README: add board picture and fix a few typos. 2020-07-27 08:53:12 +02:00
Florent Kermarrec eb8a484032 targets/de10nano: fix typo. 2020-07-26 12:01:11 +02:00
Florent Kermarrec 2cef54a909 targets/colorlight_5a_75x: avoid sys_clk_freq of 125MHz with etherbone (no longer required). 
This allows creating SoCs with CPU, SDRAM and Etherbone enabled all together.
 2020-07-26 11:58:42 +02:00
Florent Kermarrec bfbee484c7 Readme/boards: fill most of the missing infos. 2020-07-25 22:17:22 +02:00
Florent Kermarrec bb65692590 add LICENSE. 2020-07-25 20:23:52 +02:00
Florent Kermarrec e9706d4465 README: add initial contents and list of supported boards. 2020-07-25 20:21:51 +02:00
Florent Kermarrec 760b8ff93a arty: improve xy_pmod_io genericity (allow selecting the PMOD) and enable SDCard. 2020-07-24 16:29:35 +02:00
Florent Kermarrec 04fc98f834 de0nano/ulx3s: add sdram HalfRate support (untested). 2020-07-24 16:12:46 +02:00
Florent Kermarrec d0ca1befa6 targets/de10nano/minispartan6: simplify HalfRate support, rename argument to sdram_rate. 2020-07-24 16:11:57 +02:00
Florent Kermarrec 9730c6f722 platforms/de10nano: use additional sdram constraints required for HalfRate. 2020-07-24 12:27:36 +02:00
Florent Kermarrec 7399d13cef paltforms/de10nano/sdram: enable fast input/output on dq. 2020-07-24 11:27:25 +02:00
Florent Kermarrec b4b1ab8621 paltforms/de10nano: simplify IO constraints (for consistency with others platforms). 2020-07-24 09:03:35 +02:00
enjoy-digital 89c5bf43cf
Merge pull request #92 from rob-ng15/master 
Enable use of HalfRateGENSDRPHY on de10nano
 2020-07-24 08:49:09 +02:00
Florent Kermarrec 1e1589a514 zybo_z7: demonstrate use of PS7 (with --cpu-type=zynq7000). 
This uses a pre-generated .xci hosted on github, still need to figure out where the best location for it.
 2020-07-23 17:45:21 +02:00
rob-ng15 7cda143250
Allow use of HalfRateGENSDRPHY 2020-07-23 14:41:35 +01:00
rob-ng15 cf9839307f
Add Misc 
Add Misc("") arguments to various inputs/outputs for stability. Allows de10nano to use HalfRateGENSDRPHY for sdram
 2020-07-23 14:40:04 +01:00
Florent Kermarrec 8a3b453e2f add Zybo Z7 minimal platform/targets: no PS7 support and USB-UART PMOD on JB. 2020-07-23 15:26:22 +02:00
Florent Kermarrec e723bef49a platforms/arty: add usb_uart_pmod_io (USB-UART PMOD on JA) to ease debug with a second UART (for UARTbone/LiteScope). 
Also use pmod connector names in i2s_pmod and sdcard_pmod.
 2020-07-22 14:41:09 +02:00
Florent Kermarrec 19d0b95867 platforms/targets: keep in sync with litex. 2020-07-22 08:53:49 +02:00
Florent Kermarrec 0ee4b215b9 trellisboard/ulx3s: fix sdcard slewrate. 2020-07-21 15:23:08 +02:00
Florent Kermarrec 7efa1c37a1 platforms/arty: add missing pullups on sdcard. 2020-07-21 15:22:39 +02:00
Florent Kermarrec 2ce24df76d platforms/genesys2: add internal_vref to 0.750v on bank 34 (DDR3). 2020-07-18 22:18:41 +02:00
Florent Kermarrec 135c387155 platforms/ulx3s: add assertion for supported devices. 2020-07-17 12:04:06 +02:00
Florent Kermarrec 851378f0a9 platforms/trellisboard: move ddram_vtt_en. 2020-07-17 12:03:37 +02:00
enjoy-digital 165f9eacde
Merge pull request #91 from antmicro/jboc/gensdrphy 
targets/minispartan6: add support for HalfRateGENSDRPHY
 2020-07-15 08:22:57 +02:00
enjoy-digital 82f4553b54
Merge pull request #90 from jersey99/master 
Add missing pins to platforms/kc705.py: LPC DP0_M2C/C2M diff pair
 2020-07-14 11:21:39 +02:00
Jędrzej Boczar 02f53e6326 targets/minispartan6: add support for HalfRateGENSDRPHY 2020-07-14 11:01:09 +02:00
Vamsi K Vytla 44ad902aad platforms/kc705.py: LPC DP0_M2C/C2M diff pair 2020-07-13 10:26:17 -07:00
enjoy-digital 1f98bc5b94
Merge pull request #88 from gregdavill/orangecrab_changes 
OrangeCrab: Update platform
 2020-07-09 12:55:40 +02:00
Greg Davill a461f5ac59 orangecrab: add usb, rst_n signals for r0.1 
- fix standard io extensions
 - Use newly assigned code for orangecrab 1209:5af0
 2020-07-09 19:56:32 +09:30
enjoy-digital f3d02d8fca
Merge pull request #87 from antmicro/arty_i2s 
arty: Add configuration of I2S pins
 2020-07-07 17:22:10 +02:00
Pawel Sagan df54b93db3 arty: Add configuration of I2S pins 2020-07-07 15:25:10 +02:00
Florent Kermarrec d9595a317e targets/orangecrab: use user_btn as rst_n. 2020-07-06 17:49:05 +02:00
Florent Kermarrec 40fbbbbebc platforms/orangecrab: add sdcard pins on r0_2. 2020-07-06 17:48:48 +02:00
Florent Kermarrec 7b1bf9d74a targets: remove sdcard specific clock domain (now generated by the PHY). 2020-07-03 20:09:30 +02:00
Florent Kermarrec 31e6997e70 sdcard: rename cd_sdcard to cd_sd to avoid unnecessary clock domain. 2020-07-01 12:58:48 +02:00
Florent Kermarrec fe3ea805bc targets/pcie: make pcie optional (--with-pcie) and avoid forcing uart to crossover. 2020-06-30 18:44:00 +02:00
Florent Kermarrec 7a48a61605 targets: add indentifier on all targets. 2020-06-30 18:11:04 +02:00
Florent Kermarrec fc22e28fe9 targets: replace PCIeSoC with BaseSoC. 2020-06-30 17:41:57 +02:00
Florent Kermarrec d28a0c4258 targets/pcie: remove DNA/XADC/ICAP that were only on PCIe targets. 
DNA/XADC/ICAP are demonstrated in LitePCIe repository and should probably be added with
a add_xy method.
 2020-06-30 17:37:24 +02:00
Florent Kermarrec e91a5d6b82 targets/pcie: remove soft reset. 2020-06-30 17:28:13 +02:00
Florent Kermarrec 1356ebb416 targets/ecp5: update clocking on boards with DDR3 to use reset from ddrphy.init and use primary clock for Power on reset. 2020-06-29 16:42:53 +02:00
enjoy-digital 49973990f3
Merge pull request #85 from oskirby/logicbone 
Add Logicbone ECP5 board
 2020-06-29 16:24:15 +02:00