Commit Graph

1499 Commits

Author SHA1 Message Date
Florent Kermarrec 68ea5fe057 platforms/colorlight_5a_75b/v7_0: Comment rst_n to avoid deadlock on reboot command. 2022-04-25 18:50:17 +02:00
Tim 'mithro' Ansell 8830d15d83
Merge pull request #385 from jorge-rs/patch-1
Delete additional "o" in "builder" object
2022-04-24 14:56:25 -07:00
Jorge Castro-Godínez adb0922e8f
Delete additional "o" in "builder" object
Delete an additional "o" in "builder" object. It makes not possible to program the Basys 3 out-of-the-box.
2022-04-23 18:06:19 -06:00
Florent Kermarrec 575d681891 targets: Use "" for strings. 2022-04-21 15:48:29 +02:00
Florent Kermarrec 353aba0359 targets: Move USB-ACM/ValentyUSB clone directly to LiteX to avoid duplication in targets. 2022-04-21 15:43:50 +02:00
Florent Kermarrec 4fbf2fc7de targets: Replace self.add_wb_master with self.bus.add_master. 2022-04-21 15:32:19 +02:00
Florent Kermarrec 39a314cdae Rename aliexpress_u420t to aliexpress_xc7k420t. 2022-04-21 14:28:26 +02:00
Florent Kermarrec d6696f666b test/test_targets: Use new --no-compile instead of --no-compile-software/--no-compile-gateware. 2022-04-21 12:31:31 +02:00
Florent Kermarrec 88f2625c3d targets: Fix typos. 2022-04-21 12:29:54 +02:00
Florent Kermarrec a611f035d6 targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
Florent Kermarrec 14f4500653 README: Update boards list. 2022-04-21 10:39:54 +02:00
enjoy-digital 06396a2cb6
Merge pull request #384 from hansfbaier/qmtech-ep4cgx150
add board support for QMTech EP4CGX150
2022-04-21 10:36:51 +02:00
Florent Kermarrec b2a346edc8 aliexpress_u420t: Review/Simplify.
Specific integrated ROM/SRAM/MAIN_RAM size can be passed through command line parameters.
2022-04-21 10:32:18 +02:00
Florent Kermarrec 3e9e970076 Add aliexpress prefix to boards from aliexpress that seem to be from the same unknown vendor. 2022-04-21 10:06:11 +02:00
enjoy-digital 8c51cb12c8
Merge pull request #383 from sysmanalex/master
Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
2022-04-21 10:02:05 +02:00
enjoy-digital f986855926
Merge pull request #372 from mkj/butterstick-ethdelay
butterstick: set ethernet rx_delay to 0ns
2022-04-21 09:00:13 +02:00
Hans Baier 53e9e0914e qmtech_ep4cgx150 80MHz default works well 2022-04-16 15:00:01 +07:00
Hans Baier b41d72e1d0 add board support for QMTech EP4CGX150 2022-04-16 06:36:24 +07:00
Florent Kermarrec 5aab6f01b6 README: Update boards list. 2022-04-14 12:30:19 +02:00
Florent Kermarrec 0f846559f3 test/test_targets: Exclude adi_plutosdr from tested platforms (no default clock). 2022-04-14 12:23:41 +02:00
Florent Kermarrec 23b1b15486 Add initial/minimal Pluto SDR support. 2022-04-14 12:13:03 +02:00
Alex Petrov 1e00a43fdd board u420t kintex update v0.2 2022-04-13 00:12:59 +03:00
Alex Petrov 89570b005c Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board 2022-04-12 22:38:14 +03:00
Florent Kermarrec b99d788732 fairwaves/xtrx: Update with xtrx_julia improvements. 2022-04-12 17:42:52 +02:00
Florent Kermarrec dd27a3473b platforms: Add LambdaConcept's PCIe Screamer/M2. 2022-04-01 11:41:07 +02:00
Florent Kermarrec 00ff61baa9 targets: Simplify clock domains and remove useless reset_less.
rst was not directly assigned/used on reset_less clock domains, so reset_less
property was not really useful. With the changes on stream.CDC, having a rst
(Even fixed at 0) is now mandatory on clock domains involved in the CDC, so this
also fixes targets.
2022-04-01 11:30:38 +02:00
Florent Kermarrec 867489d855 xilinx_zcu106: Add PCIe Gen3 X4 support. 2022-04-01 10:01:06 +02:00
enjoy-digital 6f8a745e4f
Merge pull request #380 from fjullien/ti60_add_mipi_rx
efinix: ti60f225 add MIPI RX
2022-03-29 15:51:22 +02:00
Franck Jullien 299d4d66d6 efinix: ti60f225 add MIPI RX 2022-03-29 15:29:59 +02:00
Florent Kermarrec e705e4e053 test/test_targets: Exclude efinix_t8f81_dev_kit. 2022-03-28 15:43:02 +02:00
enjoy-digital 13e5062793
Merge pull request #379 from chmousset/add_t8_devkit
[enh] added efinix t8f81 dev kit
2022-03-28 14:58:21 +02:00
enjoy-digital e6a9f44580
Merge pull request #378 from antmicro/add-missing-peripherals
DDR4 datacenter: add missing peripherals
2022-03-28 14:40:22 +02:00
enjoy-digital 83d7c3fb39
Merge pull request #377 from Johnsel/arduino_mkrvidor4000
Board support for Arduino MKR Vidor 4000
2022-03-28 14:34:59 +02:00
enjoy-digital 1541b77781
Merge pull request #376 from hansfbaier/master
qmtech_5cefa2: make serial pins consistent with other boards
2022-03-28 14:30:28 +02:00
Charles-Henri Mousset 7a68dcc79b [enh] added efinix t8f81 dev kit 2022-03-26 09:52:20 +01:00
Alessandro Comodi 33516a40f4 antmicro_datacenter: add missing peripherals
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-25 13:49:41 +01:00
Alessandro Comodi 77cb866233 antmicro_datacenter: add HDMI output
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-03-25 10:03:07 +01:00
John Simons 501c50ff79 Fixed serial port comments hinting the correct pins. 2022-03-24 08:04:47 -07:00
John Simons 901942bda6 Cleanup for pushing. This commit combined with my litedram fork produces a running basic SoC + bios --=============== SoC ==================--
CPU:BUS:E 32-bit @ 4GiB
CSR:16-bit @ 48MT/s (CL-2 CWL-2)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 21.3MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
2022-03-24 07:39:14 -07:00
Hans Baier e445c9ec71 qmtech_5cefa2: make serial pins consistent with other boards 2022-03-24 18:52:28 +07:00
Florent Kermarrec c081177d77 pynq_z1/zybo_z7: Update .xci (With changes from #99). 2022-03-24 09:15:36 +01:00
enjoy-digital 010099b306
Merge pull request #375 from smunaut/adrv2crr
ADRV2CRR: Fixing some of my screwups that I just noticed now
2022-03-24 08:37:47 +01:00
Sylvain Munaut bcedf573e0 adi_adrv2crr: Add IO definition for the AD9545 reset line
We use PULLUP on it so that the AD9545 is by default held out
of reset without the user having to do anything ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
Sylvain Munaut cdb78efd3c adi_adrv2crr: Document I2C devices attached
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
Sylvain Munaut 6c31f16df2 adi_adrv2crr: Fix I2C signal assignement
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-23 20:42:30 +01:00
Florent Kermarrec bb974ae1af decklink_quad_hdmi_recorder: Add pcie_lanes parameter and 4x/8x support. 2022-03-23 15:24:49 +01:00
Florent Kermarrec 73458ae9d7 decklink_quad_hdmi_recorder: Add Serial/UART pins. 2022-03-23 11:08:51 +01:00
enjoy-digital d399f33dda
Merge pull request #374 from smunaut/adrv2crr
adi_adrv2crr: Upgrade part to speedgrade 2
2022-03-23 09:09:57 +01:00
enjoy-digital 4ca527974b
Merge pull request #373 from goran-mahovlic/patch-1
faster sdcard boot on 2.0
2022-03-23 08:07:49 +01:00
Sylvain Munaut dc92584681 adi_adrv2crr: Upgrade part to speedgrade 2
Even though the schematic and bom call for speedgrade 1, this was only for
the prototypes.

All productions units have been updated to speedgrade 2.

See this thread:
https://ez.analog.com/fpga/f/q-a/112356/adrv9009-zu11eg-speed-grade

And the official HDL project for the board:
https://github.com/analogdevicesinc/hdl/blob/master/projects/adrv9009zu11eg/adrv2crr_fmc/system_project.tcl#L16

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2022-03-22 23:36:41 +01:00