Florent Kermarrec
f400179b5b
targets: Import all from litex.gen on all targets.
2023-02-23 09:09:33 +01:00
stone3311
6cfb56bb07
terasic_deca: add SPI SD card support
2022-12-28 02:13:06 +01:00
Florent Kermarrec
58489ebebf
targets/BaseSoC: Cleanup parameters.
2022-11-08 12:31:49 +01:00
Florent Kermarrec
9e7079c4c8
targets: Remove int() on BaseSoC's sys_clk_freq.
2022-11-08 11:54:17 +01:00
Florent Kermarrec
b0e6414519
targets: Cleanup arguments and switch --sys-clk-freq to float (avoid conversion in code).
2022-11-08 10:41:35 +01:00
Florent Kermarrec
16b9677acd
targets: Switch to soc_core_argdict.
...
The next move was to remove soc_core and only keep soc; so this is probably the right time to do
it in targets to avoid having to handle it later.
2022-11-07 08:43:26 +01:00
Florent Kermarrec
33b0400aed
targets: Update LiteXArgumentParser imports.
2022-11-06 21:39:52 +01:00
Gwenhael Goavec-Merou
9960f38d95
targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser
2022-11-06 11:27:47 +01:00
Florent Kermarrec
548a028730
targets: Switch to LiteXModule to simplify/cleanup code.
2022-10-27 21:21:37 +02:00
Florent Kermarrec
45494f60e0
targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
...
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
Florent Kermarrec
877bc4b45e
targets: Use full imports (vendor_board).
2022-05-02 12:55:11 +02:00
Florent Kermarrec
a611f035d6
targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
...
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
Florent Kermarrec
9d452b0d74
targets: Create target_group for target arguments.
2022-03-21 18:37:40 +01:00
Florent Kermarrec
cc8da9d341
targets: Simplify imports and switch to LiteXSocArgumentParser.
...
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
2022-03-21 16:59:40 +01:00
Florent Kermarrec
773444a7dd
targets: Switch to get_bios_filename/get_bitstream_filename.
2022-03-17 09:21:05 +01:00
Florent Kermarrec
4d45611935
targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART.
2022-02-01 11:30:26 +01:00
enjoy-digital
9144cb44fb
Merge branch 'master' into jev/deca-eth
2022-01-31 16:22:58 +01:00
Jevin Sweval
fbd424fc48
DECA: Add Ethernet and Etherbone support
...
Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
Jevin Sweval
9e5224ca49
Add JTAGbone support to Terasic DECA
...
Along the way I added UARTbone support to DECA as well for debugging.
Examples:
./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover
./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00
Florent Kermarrec
fccb952c4b
target: Remove ident_version=True no longer required.
2022-01-18 17:13:02 +01:00
Florent Kermarrec
53dc00eab7
targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
...
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
Joey Bushagour
1920db3535
Add with_led_chaser argument to constructor of boards using LedChaser submodule.
2021-07-06 16:39:37 -05:00
Florent Kermarrec
7737575b88
terasic_deca: Remove --integrated-ram-size parameter (--integrated-main-ram-size provides the same functionnality).
2021-03-27 08:58:49 +01:00
Florent Kermarrec
f714e1210a
terasic_deca: Remove enforced CPU variant/debug: --cpu-variant=imac or --cpu-variant=imac+debug can be used for this.
...
The default CPU/Variant is defined in LiteX, enforcing the variant on the target
prevent usage of the other CPUs and also complicate maintenance.
2021-03-27 08:56:46 +01:00
Florent Kermarrec
53a767c85c
terasic_deca: Review/Cleanup for consistency with other boards.
2021-03-26 22:12:13 +01:00
Hans Baier
8c0ddd140b
terasic_deca: fix cable name, ulpi, names, add gpio_serial
2021-03-26 10:46:37 +07:00
Florent Kermarrec
8a3cacae32
boards: Add Vendor prefix to platforms/targets name when useful and when multiple boards from the same vendor. (With Retro-Compat on the imports).
2021-03-25 14:11:17 +01:00