Commit graph

31 commits

Author SHA1 Message Date
Florent Kermarrec
8a3cacae32 boards: Add Vendor prefix to platforms/targets name when useful and when multiple boards from the same vendor. (With Retro-Compat on the imports). 2021-03-25 14:11:17 +01:00
Florent Kermarrec
47bdf5f759 targets: Use new CSR automatic allocation (self.add_csr will still work but is no longer required). 2021-03-25 10:11:24 +01:00
Florent Kermarrec
5995769b46 targets: Switch to soc_core_args/soc_core_argdict (instead of soc_sdram that is now deprecated, but still supported for now). 2021-03-24 17:22:51 +01:00
Florent Kermarrec
75f7120ff9 targets/Ultrascale: Fix build since idelay's reset is now handled by the PLL (with_reset=True). 2021-03-11 10:00:06 +01:00
Florent Kermarrec
21207533b0 targets/Ultrascale(+): Generate Reset to idelay clock domain (to be sure to follow UG571 reset sequence). 2021-03-04 19:49:03 +01:00
Florent Kermarrec
d73bd2f7ce targets/xilinx: add comment on sys_clk to pll.clkin false path. 2021-01-07 08:01:54 +01:00
Florent Kermarrec
1ac1c6857f targets/xilinx: add false path constraint between sys_clk and pll.clkin.
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
2021-01-07 00:02:46 +01:00
Florent Kermarrec
0e3c03f2f6 mercury_xu5: remove unneeded cmd_latency=0 (now defaulting to 0). 2021-01-04 10:48:34 +01:00
Jędrzej Boczar
ce38cff41d mercury_xu5: reduce cmd_latency to fix problems with DRAM leveling 2020-11-20 15:31:47 +01:00
Florent Kermarrec
d42af3ea19 targets: add --sys-clk-freq support to all targets. 2020-11-12 18:07:28 +01:00
Florent Kermarrec
39d979a9d3 targets/Ultrascale: add missing AsyncResetSynchronizer import. 2020-11-09 10:25:05 +01:00
Florent Kermarrec
2b17dc1b89 target: add rst signal to CRG to allow full reset of the SoC on reboot command. 2020-11-04 11:13:42 +01:00
Florent Kermarrec
814e7630e4 targets/xilinx: use generic name for idelay clk (avoid clk200, clk400, etc...) since we somtimes want to change it. 2020-10-13 12:10:29 +02:00
Florent Kermarrec
c3ea04b6e9 targets/s7/us: update sdram (manual cmd_latency no longer needed). 2020-10-12 18:46:21 +02:00
Florent Kermarrec
1781be166a general: add SPDX License identifier to header and specify files are part of LiteX-Boards. 2020-08-23 15:00:17 +02:00
Florent Kermarrec
869ceadacb targets: use platform.request_all on LedChaser. 2020-08-06 20:04:03 +02:00
Florent Kermarrec
7a48a61605 targets: add indentifier on all targets. 2020-06-30 18:11:04 +02:00
Florent Kermarrec
eeba64d7b2 targets: use soc.build_name in load/flash bitstream. 2020-05-21 09:12:29 +02:00
Florent Kermarrec
6f22f082ff targets: add LedChaser on platforms with user_leds.
Default to Chaser mode and similar user interface than GPIOOut.
2020-05-08 22:16:13 +02:00
Florent Kermarrec
da61aabc5b targets: remove USDDRPHY_DEBUG and set cmd_latency to on all Kintex7/Ultrascale targets. 2020-05-05 16:32:10 +02:00
Florent Kermarrec
2d9543b65e targets: add build/load parameters on all targets. 2020-05-05 15:11:47 +02:00
Florent Kermarrec
4185a019f5 targets: manual define of the SDRAM PHY is no longer needed. 2020-04-16 11:25:59 +02:00
Florent Kermarrec
3b91e96c42 targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
Florent Kermarrec
555bf6c4dc targets/Ultrascale(+): enable USDDRPHY_DEBUG. 2020-03-26 09:17:09 +01:00
Florent Kermarrec
83e6fb29f8 targets: switch to SoCCore/add_sdram instead of SoCSDRAM. 2020-03-21 12:43:39 +01:00
Florent Kermarrec
74a5ffb9ef targets/Ultrascale+: use 500MHz IDELAYCTRL reference clock.
The minimum is 300MHz on Ultrascale+ vs 200MHz on Ultrascale.
2020-03-10 16:58:30 +01:00
Florent Kermarrec
e2a66090ee targets/Ultrascale(+): simplify CRG using USIDELAYCTRL. 2020-03-10 16:55:22 +01:00
Florent Kermarrec
cf58550bba targets/Ultrascale+: use USPDDRPHY. 2020-03-10 16:06:48 +01:00
Jędrzej Boczar
90de99eb46 platforms/mercury_xu5: fix sdram timing issues 2020-03-10 15:03:31 +01:00
Florent Kermarrec
5031c11d57 mercury_xu5: add missing copyrights. 2020-03-09 09:23:08 +01:00
Jędrzej Boczar
d002059e0b add Enclustra Mercury XU5 board 2020-03-05 10:52:32 +01:00