e489c3e3de
Change Serial port to pmoda:0/1
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Remove usb_uart. Copyright notice update.
2022-01-13 23:24:50 +05:30
ed50c84e0d
Support for Digilent Pynq Z1
2022-01-11 19:33:12 +05:30
bd95ce5e47
Create digilent_pynq_z1.py
2022-01-11 19:31:33 +05:30
8a33c2aa31
targets: Ensure litex.soc.cores.spi_flash is no longer imported/used.
2022-01-07 19:07:14 +01:00
4b6a9b2cf0
targets/spiflash: Simplify self.cpu.set_reset_address call.
2022-01-07 15:19:23 +01:00
30cacc19c2
efinix_xyloni_dev_kit: Update SPI Flash.
2022-01-07 15:00:39 +01:00
16171282c8
digilent_arty/CRG: Add with_rst parameter to be able to easily disable rst.
...
On Arty, cpu_rst pin is connected to a button but also to USB-UART which also
resets the SoC when USB-UART is connected which is in some case not wanted.
with_rst provides an easy way to disable rst by setting it to False.
2022-01-07 14:12:28 +01:00
3ebbebe750
Merge pull request #319 from antmicro/datacenter-updates
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antmicro-datacenter updates
2022-01-07 11:03:30 +01:00
f95e2220f2
test/test_targets: Remove qmtech_10cl006 from excluded targets.
2022-01-07 10:49:05 +01:00
8151bf7ffa
targets: Update and simplify SPI-Flash support (Address is now automatically allocated).
2022-01-07 10:34:47 +01:00
a4130556ac
gsd_butterstick: Add optional SYZYGY GPIO (--with-syzygy-gpio) to expose the 32 GPIOs on SYZYGY breakout board.
2022-01-06 18:37:42 +01:00
4ae7b5e4ff
antmicro_datacenter: extend eth reset
2022-01-06 17:40:44 +01:00
86b9b1b56c
antmicro_datacenter: fix clock pin LOC
2022-01-06 17:38:49 +01:00
144c0dc27e
digilent_zedboard: +x.
2022-01-06 09:38:19 +01:00
28cdc8b914
spartan_edge_accelerator: Review/Simplify.
2022-01-06 09:37:46 +01:00
2c6ce12154
spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list.
2022-01-06 09:06:27 +01:00
1ee619a455
Merge pull request #317 from primeshp/spartanacc
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Spartan Edge Accelerator Board support
2022-01-06 09:03:02 +01:00
fd70f5f125
Merge pull request #318 from Logicwax/master
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fix(vc707): fix 'dat' typo
2022-01-06 08:49:24 +01:00
6b0bd4da4d
fix(vc707): fix 'dat' typo
2022-01-05 20:02:07 -08:00
db9173ad8b
targets/alchitry_mojo: Fix build.
2022-01-05 18:11:53 +01:00
53dc00eab7
targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
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Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
d9303e096b
Bump year.
2022-01-05 09:09:16 +01:00
9ad1723ac1
efinix_titanium_ti60_f225_dev_kit: Cleanup HyperRAM IOs.
2022-01-04 15:52:42 +01:00
c836b57145
titanium_ti60_f225_dev_kit: Add HyperRAM separator.
2022-01-04 15:18:26 +01:00
28a6fad705
targets/efinix_titanium_ti60_f225: Defaults to 200MHz clock and increase HyperRam size to 32MB.
2022-01-04 11:25:18 +01:00
f5ac5200ff
Added Spartan Edge Accelerator board
2022-01-03 17:14:54 -05:00
713ae531f6
Add Spartan Edge Accelerator support
2022-01-03 16:31:13 -05:00
059563245d
Merge pull request #314 from sergachev/zedboard
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LiteX BIOS on Zedboard
2022-01-03 17:59:22 +01:00
c9816f2bc1
snicker_doodle: Add z7-10/z7-20 variants support.
2022-01-03 17:15:27 +01:00
dc61d383e6
snickerdoodle: Rename to krtkl_snicker_doodle and do minor cosmetic changes.
2022-01-03 17:09:17 +01:00
b48d96c40d
Merge pull request #309 from derekmulcahy/master
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Initial release for Snickerdoodle
2022-01-03 16:46:14 +01:00
fae2cecf93
Merge pull request #315 from hubmartin/master
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Fix cannot find board 'littlebee'
2022-01-03 16:09:12 +01:00
3dd85d9afb
Merge pull request #313 from fjullien/add_io_to_t120
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efinix: add clock pins to t120 bga576 platform
2022-01-03 16:07:54 +01:00
064406e2f6
Merge branch 'master' of github.com:hubmartin/litex-boards
2021-12-27 21:08:13 +01:00
b98d76ff39
Fix cannot find board bug
2021-12-27 21:07:16 +01:00
2a6282273f
Merge branch 'litex-hub:master' into master
2021-12-24 22:19:33 -05:00
a118a0e499
Replaced Blinky with LedChaser.
2021-12-24 22:14:18 -05:00
b5008a2d5c
platforms/radiona_ulx3s: Use specific GPDI mapping for 1.7/2.0 revision.
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Data channels 0/2 are swapped between revisions.
2021-12-23 10:39:58 +01:00
bc3c42ab5f
zedboard: disable soc uart for all variants (zynq does not need it, for soft cpus there are no pins)
2021-12-22 03:28:13 +01:00
53ce00b3fd
zedboard: add target with bios on arm zynq cpu
2021-12-22 03:14:13 +01:00
43a1e13b53
zedboard: compress bitstream, derive default clk f
2021-12-22 03:13:30 +01:00
166451e65e
zedboard: remove fake serial
2021-12-22 03:12:48 +01:00
379745b039
efinix: add clock pins to t120 bga576 platform
2021-12-21 12:34:19 +01:00
154cb672da
Removed unused ext_freq parameter.
2021-12-20 21:42:21 -05:00
81404ff185
Improved PS7 support. Configured external clock.
2021-12-20 21:14:18 -05:00
15ea01197d
Added placeholder clk/led/uart.
2021-12-20 21:12:46 -05:00
d64207f8b6
Merge branch 'litex-hub:master' into master
2021-12-20 17:35:35 -05:00
94b4789286
Merge pull request #312 from trabucayre/arty_z7
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adding digilent_arty_z7 support
2021-12-20 21:50:41 +01:00
8772190177
Merge pull request #311 from tilk/icesugar_pro
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Option --with-spi-flash for iCESugar-Pro
2021-12-20 21:49:26 +01:00
8664b59f23
targets: Fix --bios-flash-offset support and other minor cleanups.
2021-12-20 21:41:12 +01:00
Rakesh Peter
Florent Kermarrec
Karol Gugala
Matthew Brooks
Primesh
hubmartin
derekmulcahy
Derek Mulcahy
Ilia Sergachev
Franck Jullien