Commit Graph

368 Commits

Author SHA1 Message Date
Piotr Esden-Tempski ce9b67e2ee Added icebreaker platform and target.
Target is heavily based on Fomu.
2020-03-05 00:12:18 -08:00
Florent Kermarrec be5ed35871 targets: default to trellis toolchain on all ECP5 targets (now able to build all supported targets). 2020-02-28 09:46:54 +01:00
Florent Kermarrec b44885d222 vc707: fix copyrights (Michael Betz is the initial author) 2020-02-28 08:39:52 +01:00
Florent Kermarrec b89af28a05 targets/kc705: use DDRPHY_CMD_DELAY to center write leveling. 2020-02-27 12:58:52 +01:00
Florent Kermarrec d8de4fbdfb platforms/targets: keep in sync with LiteX 2020-02-27 11:06:53 +01:00
Florent Kermarrec d87b8b3c66 zcu104: add separate ddram_32/64 definitions and use ddram_32 for now.
Ease switching between ddram_32 and ddram_64.
2020-02-27 10:05:17 +01:00
Florent Kermarrec 8ecfb13f3c zcu104: add copyrights 2020-02-27 09:57:26 +01:00
Piotr Binkowski 608541d5b8 add ZCU104 board 2020-02-26 13:53:21 +01:00
Florent Kermarrec 4a84e9b08a targets/colorlight_5a_75b: add instruction to build/load and use bitstream with wishbone-tool 2020-02-25 12:47:08 +01:00
Florent Kermarrec f279fe9d33 vc707: cleanup platform/targets, remove Ethernet support (no Ethernet pads defined) 2020-02-25 10:35:18 +01:00
Florent Kermarrec 3581df5af6 vc707: cleanup platform/targets, remove Ethernet support (SGMII is not currently supported) 2020-02-25 09:41:53 +01:00
Florent Kermarrec 88a1f80db1 vc707/vcu118: use proper copyrights 2020-02-25 09:03:52 +01:00
Fei Gao 373e74f435 add new board files for VC707 and VCU118, only specified limited ports for VCU118, including clock, reset and DDR4 2020-02-24 14:20:47 -05:00
Sean Cross f72e7bd314
Merge pull request #41 from lromor/fix-wrong-import
Changed wrong imports for fomu board.
2020-02-12 18:48:13 +07:00
Leonardo Romor ec30cc05c3
Changed wrong imports for fomu board. 2020-02-12 12:40:07 +01:00
Florent Kermarrec c94360c2e0 targets: avoid direct use of mem_decoder. 2020-02-11 21:59:42 +01:00
Florent Kermarrec 4edf196911 targets/EthernetSoC: be sure memory region is added before adding Wishbone Slave (required by new SoC) 2020-02-11 17:45:35 +01:00
Florent Kermarrec 8211aca2e8 Avoid Official/Partner/Community differentiation: use same directory for all platforms/targets.
We initially wanted to provide different level of support for the platforms/targets, mainly
to avoid too much maintenance and let each contributor update its contributed platforms and
targets, but it's easier to update all platforms/targets all-together when LiteX evolves or
changes (and that's what has been done on litex-boards since the creation of the repository).
So let just simplify things and avoid this differentiation.
2020-02-03 09:36:30 +01:00