Commit graph

812 commits

Author SHA1 Message Date
Sean Cross
c8e8f254ca targets: fomu: add USBSoC and default to heap placer
The heap placer is important enough that we should just make it the
default.

Also, add a `USBSoC` that includes the required interrupt table, as this
must be specified prior to calling `__init__()`.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-17 17:08:05 +08:00
Sean Cross
218bd353c1 targets: fomu: use memory array for sram address
Use the memory array to find the address for the sram bank.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-17 17:07:26 +08:00
Sean Cross
348677598d targets: fomu: support building with a cpu
Allow the user to specify a CPU.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-17 17:06:23 +08:00
Florent Kermarrec
e94c6c8f27 partner/netv2: switch to MVP (K4B2G1646F instead of MT41J128M16) 2019-09-12 09:52:13 +02:00
Florent Kermarrec
91feb59f49 Merge branch 'master' of http://github.com/litex-hub/litex-boards 2019-09-11 23:02:44 +02:00
Florent Kermarrec
a92ce32f91 targets/netv2: add clk100 (for framebuffer) 2019-09-11 23:02:21 +02:00
Florent Kermarrec
ec97d01feb platforms/netv2: add spiflashx4, hdmi in/out 2019-09-11 23:01:58 +02:00
Antti Lukats
91a1520655 add initial Trenz Cyclone 10 LP RefKit support with SDRAM/HyperRAM/Ethernet 2019-09-10 11:32:29 +02:00
Florent Kermarrec
c6bb34d78a partner/targets/nereid: MT8KTF51264 now in LiteDRAM 2019-09-09 08:50:06 +02:00
Florent Kermarrec
b4eefa6c33 import: allow importing directly from litex_boards.platforms or litex_boards.targets 2019-09-03 15:30:20 +02:00
Florent Kermarrec
ec5540454b partner: aller/nereid/tagus fix copyright (Rohit Singh as main author), do some cosmetic 2019-09-02 11:43:30 +02:00
enjoy-digital
5b605d37a2
Merge pull request #16 from rohitk-singh/master
partner: add platforms and targets for aller, tagus and nereid boards
2019-09-02 11:31:46 +02:00
enjoy-digital
cd527f0fcb
Merge branch 'master' into master 2019-09-02 11:29:22 +02:00
Florent Kermarrec
d78965ffb2 partner/targets/fomu fix copyright & mode 2019-09-02 11:23:43 +02:00
enjoy-digital
46a0978d35
Merge pull request #17 from xobs/add-fomu-target
partner: add fomu target
2019-09-02 11:18:53 +02:00
Sean Cross
bdbd2ec1c0 partner: add fomu target
This adds the Fomu target back in.  The default BaseSoC supports
various USB methods, and will be updated as more become available.

The debug bridge may optionally be added.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 14:18:09 +08:00
Florent Kermarrec
e704014b36 targets/__init__: comment targets import until we found a way to avoid litedram/liteeth dependecies for targets no using them. 2019-09-01 11:43:21 +02:00
Rohit Singh
346621b9fc partner: add platforms and targets for aller, tagus and nereid boards 2019-09-01 03:02:04 -05:00
Florent Kermarrec
1131af05af nexys_video: generate clk100 2019-08-27 14:05:07 +02:00
Florent Kermarrec
f661ee0ec9 targets: fix import 2019-08-26 11:00:12 +02:00
Florent Kermarrec
b21944c05a test/tests_targets: add kcu105/ecp5_evn and cleanup indent 2019-08-26 09:19:32 +02:00
Florent Kermarrec
ac58d57a83 targets: import platforms from litex_boards.platforms 2019-08-26 09:09:40 +02:00
Florent Kermarrec
b84308cb58 list all platforms/targets in platforms.py, targets.py to ease import 2019-08-26 09:07:07 +02:00
enjoy-digital
596a854061
Merge pull request #13 from DurandA/patch-1
Fix ecp5_evn clock
2019-08-26 06:52:48 +02:00
Arnaud Durand
618f41bb1e
Update ecp5_evn.py
The system clock was driven directly while it should be driven by the PLL.
2019-08-22 02:27:50 +02:00
enjoy-digital
e31360b1c6
Merge pull request #11 from DurandA/master
Turn litex_boards.community into module
2019-08-12 07:05:31 +02:00
DurandA
1abca7dcff Turn litex_boards.community into module 2019-08-12 00:17:26 +02:00
enjoy-digital
ad21f15782
Merge pull request #10 from DurandA/ecp5-evn
Add ECP5 Evaluation Board
2019-08-09 12:37:36 +02:00
DurandA
c90950e319 Default to 60 Mhz system clock on ECP5 Evaluation Board
Exact PLL clock can be derived from U1 12 Mhz or X5 50 Mhz clock.
2019-08-09 11:58:30 +02:00
DurandA
9e6dccc277 Remove ECP5 Evaluation Board programmer 2019-08-09 11:54:49 +02:00
DurandA
4126ed21d5 Add X5 clock and PLL to ECP5 Evaluation Board 2019-08-09 11:54:38 +02:00
DurandA
c7444fe19c Add ECP5 Evaluation Board 2019-08-09 09:45:13 +02:00
Florent Kermarrec
2596b20982 partner/targets/fomu: remove for now since only has a CRG (we'll add one later with a real design) 2019-08-07 09:08:11 +02:00
Florent Kermarrec
0c1fa7f4a8 partner/platform/fomu: cleaup, make it similar to others platforms 2019-08-07 09:04:31 +02:00
Florent Kermarrec
9f3ed82097 keep up to date with LiteX
- use 1e9/freq for default_clk_period
- add default serial on tinyfpga_bx
- use S6PLL on minispartan6
- add SPIFlash pins on versa_ecp5
2019-08-07 08:47:08 +02:00
Florent Kermarrec
bbf0e770e9 partner/targets/trellisboard: cleanup/update 2019-07-12 19:39:12 +02:00
Florent Kermarrec
a792502756 targets: make sure all targets have copyrights & #!/usr/bin/env python3 2019-07-12 19:36:49 +02:00
Florent Kermarrec
83455ee08b test_targets: add trellisboard 2019-07-12 19:26:31 +02:00
Florent Kermarrec
e470b55d2b fomu, trellisboard: +x 2019-07-12 19:24:08 +02:00
Florent Kermarrec
a88970a67f move trellis board from community to partner 2019-07-12 19:23:21 +02:00
Florent Kermarrec
82d73b8359 Merge branch 'master' of http://github.com/litex-hub/litex-boards 2019-07-12 19:19:31 +02:00
Florent Kermarrec
debafd7c17 official/partner: update 2019-07-12 19:19:01 +02:00
enjoy-digital
1fdaf5dbf3
Merge pull request #7 from daveshah1/trellisboard
community: Add TrellisBoard
2019-07-09 17:06:22 +02:00
David Shah
a07e88d761 community: Add TrellisBoard
Signed-off-by: David Shah <dave@ds0.me>
2019-07-09 15:52:28 +01:00
enjoy-digital
7ba91154d7
Merge pull request #5 from DurandA/master
Turn litex_boards.partner into module
2019-07-08 15:01:28 +02:00
DurandA
adcc34b528 Turn litex_boards.partner into module 2019-07-01 19:36:34 +02:00
enjoy-digital
2817c943f5
Merge pull request #4 from DurandA/master
Add litex_boards package to setup.py
2019-07-01 18:56:36 +02:00
Arnaud Durand
baac94e0a4
Add litex_boards package to setup.py 2019-07-01 18:40:58 +02:00
Florent Kermarrec
fa8935f4ea add travis-ci 2019-06-24 12:41:33 +02:00
Florent Kermarrec
325b6399a2 add test/test_targets (only test platforms with simple target for now) 2019-06-24 12:38:58 +02:00