Commit Graph

9616 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq f3ae22f488 fhdl/verilog: initialize internal read-only signals with their reset values 2012-04-01 16:39:11 +02:00
Sebastien Bourdeauducq 185bd66ee4 tb/asmicon: bankmachine test bench 2012-03-31 18:11:29 +02:00
Sebastien Bourdeauducq 0dfc215fe8 corelogic/roundrobin: handle correctly special case with 1 request source 2012-03-31 18:01:40 +02:00
Sebastien Bourdeauducq b1e5b9ef36 tb/asmicon/bankmachine: test buffer and NACK 2012-03-31 10:06:44 +02:00
Sebastien Bourdeauducq c129c98e10 tb/asmicon/bankmachine: selector test bench 2012-03-31 09:56:22 +02:00
Sebastien Bourdeauducq ac7d89a4fe asmicon/bankmachine: fixes 2012-03-31 09:55:52 +02:00
Sebastien Bourdeauducq 94b02aa8ed bus/asmicon: initiator 2012-03-30 22:16:31 +02:00
Sebastien Bourdeauducq bccc5f5c21 tb: remove obsolete norflash test bench 2012-03-30 16:41:12 +02:00
Sebastien Bourdeauducq c6a4a8f462 tb/asmicon: refresher test 2012-03-30 16:40:51 +02:00
Sebastien Bourdeauducq bb864c65dc sim: proxy 2012-03-30 16:40:26 +02:00
Sebastien Bourdeauducq cd82f16806 asmicon/refresher: fix refresh sequence done signal 2012-03-30 16:26:50 +02:00
Sebastien Bourdeauducq 081b658e2d Update copyright notices 2012-03-23 16:41:30 +01:00
Sebastien Bourdeauducq ab799b874f tools: new flterm 2012-03-21 09:11:43 +01:00
Sebastien Bourdeauducq d47b564fad corelogic/fsm: typo 2012-03-18 22:12:46 +01:00
Sebastien Bourdeauducq c26efa28ca asmicon: multiplexer (untested) 2012-03-18 22:11:01 +01:00
Sebastien Bourdeauducq 0e00837f42 asmicon: move slot time to timing settings 2012-03-18 14:57:31 +01:00
Sebastien Bourdeauducq b1eb919ad2 asmicon: bank machine (untested) 2012-03-18 00:12:03 +01:00
Sebastien Bourdeauducq 5f28103769 corelogic/fsm: delayed enters 2012-03-18 00:09:40 +01:00
Sebastien Bourdeauducq a4294762d0 corelogic/roundrobin: CE switching 2012-03-16 16:54:47 +01:00
Sebastien Bourdeauducq 7c377880fa asmicon: refresher (untested) 2012-03-15 20:29:26 +01:00
Sebastien Bourdeauducq e3ef121440 norflash: use new timeline API 2012-03-15 20:26:04 +01:00
Sebastien Bourdeauducq e969b9afc3 corelogic: convert timeline to function and move to misc 2012-03-15 20:25:44 +01:00
Sebastien Bourdeauducq 7b14e0bd05 asmicon: skeleton 2012-03-14 18:26:05 +01:00
Sebastien Bourdeauducq 1665f293a6 bus/asmibus/hub: require finalization before get_slots 2012-03-14 16:19:29 +01:00
Sebastien Bourdeauducq 5c0cc6292c fhdl: export log2_int 2012-03-14 12:19:42 +01:00
Alain Péteut 97fece249d setup.py: simplify
Signed-off-by: Alain Péteut <alain.peteut@yahoo.com>
2012-03-11 00:52:13 +01:00
Sebastien Bourdeauducq f6e76ae198 doc: more examples and comments 2012-03-10 19:38:39 +01:00
Sebastien Bourdeauducq 1f4c58ee26 doc: cosmetic changes (thanks sh4rm4 for reporting typos) 2012-03-10 17:59:42 +01:00
Sebastien Bourdeauducq 78c707e354 doc: use script font 2012-03-09 21:57:50 +01:00
Sebastien Bourdeauducq 7b1101ab99 doc: simulation 2012-03-09 21:17:21 +01:00
Sebastien Bourdeauducq 0165d23295 doc: cosmetic changes (thanks rofl0r for reporting typos) 2012-03-09 18:26:00 +01:00
Sebastien Bourdeauducq 59db4e9106 doc: add logo 2012-03-09 17:16:33 +01:00
Sebastien Bourdeauducq 90546fd811 doc: switch to sphinx 2012-03-09 17:08:38 +01:00
Sebastien Bourdeauducq 57a87b3316 examples: FIR filter simulation 2012-03-08 20:49:36 +01:00
Sebastien Bourdeauducq bfcd4e636b fhdl: handle negative constants correctly 2012-03-08 20:49:24 +01:00
Sebastien Bourdeauducq f4adb0fe9c examples: remove outdated wb_intercon simulation 2012-03-08 18:17:56 +01:00
Sebastien Bourdeauducq 84aa703447 vpi: support extra include directories 2012-03-08 18:14:40 +01:00
Sebastien Bourdeauducq bbaadebf68 gitignore: update 2012-03-08 18:14:19 +01:00
Sebastien Bourdeauducq ab800fa2ed bus: generic transaction model 2012-03-08 18:14:06 +01:00
Sebastien Bourdeauducq ddc0e49981 vpi: patch for Icarus Verilog 2012-03-08 17:27:59 +01:00
Sebastien Bourdeauducq 59a57e7a76 examples: small cleanup 2012-03-08 15:55:02 +01:00
Sebastien Bourdeauducq 678a89d572 sim: fix zero encoding 2012-03-08 15:34:08 +01:00
Sebastien Bourdeauducq decbd069fa sim: fix message debug formatting 2012-03-08 15:27:35 +01:00
Sebastien Bourdeauducq 98e96b3952 sim: make initialization cycle optional (selectable by function attribute) 2012-03-06 19:43:59 +01:00
Sebastien Bourdeauducq 8160ced2e9 sim: memory access 2012-03-06 19:29:39 +01:00
Sebastien Bourdeauducq db8f8bf2e3 fhdl: register memory objects with namespace 2012-03-06 18:33:44 +01:00
Sebastien Bourdeauducq 6f829c7afc sim: support for signed numbers 2012-03-06 16:46:18 +01:00
Sebastien Bourdeauducq 90184b22d2 fhdl/verilog: fix signed constant conversion 2012-03-06 16:45:44 +01:00
Sebastien Bourdeauducq 0a23cadd38 vpi: install target 2012-03-06 15:51:09 +01:00
Sebastien Bourdeauducq 9da512dbf5 sim: VCD generation 2012-03-06 15:26:04 +01:00