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261 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 0168f83523 MultiReg: remove idomain 2013-03-15 19:51:29 +01:00
Sebastien Bourdeauducq b2173bba9f Use new ClockDomain API 2013-03-15 19:17:05 +01:00
Sebastien Bourdeauducq 2ae504fb9b software/bios: default length 4 for mr command 2013-03-13 19:59:39 +01:00
Sebastien Bourdeauducq eaef3464e9 Instantiate DVI sampler core for both ports 2013-03-13 19:56:56 +01:00
Sebastien Bourdeauducq e99bafe52b dvisampler: add core, EDID support 2013-03-13 19:56:26 +01:00
Sebastien Bourdeauducq 1e7783a41e build.py: use implicit get_fragment 2013-03-12 16:13:20 +01:00
Sebastien Bourdeauducq a23df42a7a Use automatic register naming 2013-03-12 15:47:54 +01:00
Sebastien Bourdeauducq a9b723568a Use new module, autoreg and eventmanager Migen APIs 2013-03-10 19:32:38 +01:00
Sebastien Bourdeauducq 2059592db2 software/libcompiler-rt: add ctzsi2 2013-03-06 11:10:16 +01:00
Sebastien Bourdeauducq 356416fcdc lm32: update 2013-02-24 17:42:28 +01:00
Sebastien Bourdeauducq 70f4c74d46 m1crg: advance off-chip DDR clock phase 2013-02-24 17:41:56 +01:00
Sebastien Bourdeauducq 5e6505b946 bios: print number of memory errors 2013-02-24 16:51:03 +01:00
Sebastien Bourdeauducq b854f1ad32 build: support optional MMU 2013-02-24 16:28:59 +01:00
Sebastien Bourdeauducq 43343b131f lm32: use submodule 2013-02-24 15:57:19 +01:00
Sebastien Bourdeauducq 0caac2246d Use new 'specials' API 2013-02-24 13:07:25 +01:00
Sebastien Bourdeauducq a22ada36d7 corelogic -> genlib 2013-02-24 12:31:00 +01:00
Sebastien Bourdeauducq dfec152422 Build FPG file 2013-02-19 13:27:43 +01:00
Sebastien Bourdeauducq 3f22930b1f tools: add byteswap 2013-02-19 13:22:35 +01:00
Sebastien Bourdeauducq 07120e3c3e bios: use puts for long string 2013-02-17 16:21:25 +01:00
Sebastien Bourdeauducq 8247f3a154 bios: add build date to banner 2013-02-17 14:29:11 +01:00
Sebastien Bourdeauducq b135d87ca2 Makefile: correct bitstream filename 2013-02-17 00:12:15 +01:00
Sebastien Bourdeauducq 20003f0ada software: go back to GCC 2013-02-16 23:41:42 +01:00
Sebastien Bourdeauducq c56c916129 load.jtag: remove CFG_OUT/CFG_IN instructions 2013-02-15 19:39:54 +01:00
Sebastien Bourdeauducq 7ad2f7081b m1crg: fix signal names 2013-02-13 23:59:35 +01:00
Sebastien Bourdeauducq 5649e88a90 Use Mibuild 2013-02-11 18:23:06 +01:00
Sebastien Bourdeauducq f68fcef90c tb: use default runner 2013-02-09 17:09:29 +01:00
Sebastien Bourdeauducq a94ee3884f software/include: add float.h 2013-01-12 10:57:43 +01:00
Sebastien Bourdeauducq 83f562a76c software/include: add stdbool.h 2013-01-12 10:51:07 +01:00
Sebastien Bourdeauducq 080dbaa206 software: hide and delete .ts files 2013-01-10 18:01:42 +01:00
Sebastien Bourdeauducq 7adee988f2 software: compile compiler-rt ourselves 2013-01-10 17:59:00 +01:00
Sebastien Bourdeauducq d576893bda software/include/base/stdint.h: add INT32_C 2013-01-10 17:58:17 +01:00
Sebastien Bourdeauducq c5c29199be software: run the assembler ourselves to prevent future time wastage due to breakage of our custom Clang toolchain 2013-01-10 17:20:31 +01:00
Sebastien Bourdeauducq c490917aec software/common.mak: remove -fsigned-char from CFLAGS 2013-01-10 17:14:51 +01:00
Sebastien Bourdeauducq e4144f2c7d software/common.mak: use -target instead of deprecated -ccc-host-triple 2013-01-10 17:13:33 +01:00
Sebastien Bourdeauducq b0503aaf85 software/include/base/stdint.h: more definitions 2013-01-10 17:10:29 +01:00
Sebastien Bourdeauducq 51f4f920a2 Do not use super() 2012-12-18 14:55:58 +01:00
Sebastien Bourdeauducq c44ff8941c Move Token 2012-12-14 15:54:16 +01:00
Sebastien Bourdeauducq 3986790621 Remove ActorNode 2012-12-12 22:52:55 +01:00
Sebastien Bourdeauducq 053f8ed82c Fix instantiations 2012-12-06 20:57:00 +01:00
Sebastien Bourdeauducq 0392dd8ac2 bank/csrgen: interface -> bus 2012-12-06 17:15:47 +01:00
Sebastien Bourdeauducq bec02c4783 Merge branch 'master' of github.com:milkymist/milkymist-ng 2012-12-01 12:59:47 +01:00
Sebastien Bourdeauducq fee70e9866 Use Wishbone SRAM component from Migen 2012-12-01 12:59:32 +01:00
Michael Walle 7a1e4cb66b lm32: fix watchpoints 
The wp_match_n vector is off by one. Which results in undefined states, at
least in simulation.

Signed-off-by: Michael Walle <michael@walle.cc>
 2012-11-30 15:22:40 +01:00
Sebastien Bourdeauducq 293a62dabe Replace Signal(bits_for(... with Signal(max=... 2012-11-29 23:41:51 +01:00
Sebastien Bourdeauducq 8bf6945dfd Use new bitwidth/signedness system 2012-11-29 23:38:04 +01:00
Sebastien Bourdeauducq 7e2bc00c0a Remove Constant 2012-11-28 23:18:53 +01:00
Sebastien Bourdeauducq 79e5f24a65 Workaround for zero-delay loop simulation problem with Icarus Verilog. TODO: clarify and revert this commit. 2012-11-28 22:49:22 +01:00
Sebastien Bourdeauducq 0620e75cb8 sram: do not use MemoryPort 2012-11-26 19:32:56 +01:00
Sebastien Bourdeauducq 0c29775a8f tb/asmicon/asmicon_wb: more complete testing by default 2012-11-26 18:19:41 +01:00
Sebastien Bourdeauducq 5ae1b2644e tb/asmicon: new initiator API 2012-11-17 19:43:30 +01:00