1209ec17f6
actorlib/fifo: rewrite
...
* use classes for less code duplication
* the idea of decorator is to avoid passing common parameters (e.g. clock domain names) in module constructors, so remove those parameters
* style
2013-09-04 17:22:50 +02:00
87a68ecd57
examples/basic/namer: cleanup
2013-09-04 17:20:40 +02:00
71b14ac873
actorlib: add fifo
2013-09-04 17:15:22 +02:00
deb438ca18
lasmicon/multiplexer/steerer_sel: replace STEER_ with string
2013-08-26 21:21:00 +02:00
d1dddad811
lasmicon: remove limitations on the number of phases
2013-08-26 21:14:35 +02:00
7acd834964
tb/lasmicon: update simu
2013-08-26 20:54:47 +02:00
dac10f5570
bus/wb2lasmi: use existing interface to determine WB width to be consistent with other modules
2013-08-26 20:33:34 +02:00
2cf6b6c768
wishbone/SRAM: fix non-32-bit bus
2013-08-26 20:32:59 +02:00
33ca4d778f
wishbone2lasmi: configurable data width
2013-08-26 20:29:12 +02:00
628fa8ce9e
wishbone : add DownConverter
2013-08-26 20:28:09 +02:00
9569152309
altera_quartus: fix import _Fragment
2013-08-26 20:13:30 +02:00
7b21102849
s6ddrphy: drive ODT (if it exists)
2013-08-22 22:56:05 +02:00
a653a6144b
wishbone2lasmi : add support for 32 bits lasmim data width
2013-08-20 18:49:46 +02:00
37930d70ac
genlib/misc: improve genericity of split/displacer/chooser
2013-08-20 18:49:02 +02:00
516a1d3464
Update LM32 submodule
2013-08-14 19:16:44 +02:00
316faa7fa8
platforms/m1: resetless by default
2013-08-14 00:46:30 +02:00
6f9f08f6eb
add ternary operator sel ? a : b
2013-08-12 13:15:56 +02:00
e12187aa80
add += operator to fragment
2013-08-12 13:15:05 +02:00
4ebbfa63bf
add mist synthesis mode to build
2013-08-12 13:13:25 +02:00
fdf022a04b
fhdl: improve naming of related signals
2013-08-08 19:22:17 +02:00
2c580fff03
fhdl/namer: detect leaf nodes better
2013-08-08 12:22:58 +02:00
eb1417c5ed
fhdl: move insert_resets to tools
2013-08-08 11:32:58 +02:00
305c6985bc
fhdl: support for naming related signals
2013-08-08 11:32:37 +02:00
88611be368
xilinx_ise: cleanup
2013-08-08 00:15:35 +02:00
146a1b5d51
namer: add HUID suffix step
2013-08-08 00:15:18 +02:00
9d531ba06a
Fix missing string replace. Added support for 32-bit ISE if 64-bit version is missing on 64-bit system.
2013-08-08 00:07:35 +02:00
fd34b75fb4
namer: split by numbers
2013-08-07 23:22:40 +02:00
0e369318bb
treeviz: support multiline labels
2013-08-07 21:46:03 +02:00
ceddd8afa4
treeviz: improve layout of unbalanced trees
2013-08-07 18:32:02 +02:00
7a243171bd
fhdl/namer: new namer with explicit tree
2013-08-07 17:13:52 +02:00
cc5ff7a772
add tree visualizer
2013-08-07 15:52:35 +02:00
6e64016885
add edif build routines
2013-08-03 10:55:12 +02:00
efa7dc9cf4
fhdl/edif: adjust for use with mibuild
2013-08-03 10:54:06 +02:00
7372c7a97c
fhdl/edif: add support for inout signals
2013-08-03 10:51:24 +02:00
0e195da3c0
bank/csrgen: add get_offset function to pre-calculate register addresses
2013-08-02 23:05:54 +02:00
2a296aced7
bank/description/AutoCSR: prefix csr/mem only once
2013-08-02 23:05:21 +02:00
c1fe6d1633
setup.py: change license to BSD
2013-08-01 17:46:46 +02:00
275a7ea94a
Change license to BSD
2013-08-01 17:46:09 +02:00
3d3d658795
m1nor-ng
2013-07-31 23:29:26 +02:00
3a4e7ae1e9
typo
2013-07-31 23:22:06 +02:00
524b631c83
Change license to BSD
2013-07-31 23:20:32 +02:00
17002fb05e
fhdl: add EDIF back-end
2013-07-31 22:47:43 +02:00
702471aa3c
platforms/mixxeo: new pin assignments to ease routing
2013-07-29 12:24:49 +02:00
246b860a85
csr: new data width API
2013-07-28 16:33:36 +02:00
6ba0d4bd0d
bus/wishbone: configurable data width
2013-07-27 22:25:07 +02:00
14ed5c1acc
genlib/record: support abstract signal width
2013-07-27 22:18:06 +02:00
7e20320b9d
pytholite/io: len -> flen
2013-07-27 15:38:48 +02:00
04ec60541c
pythloite/ExprCompiler: attempt compile-time evaluation first
2013-07-27 15:38:29 +02:00
f62eff0309
bus/csr/Initiator: correct read latency
2013-07-27 15:37:47 +02:00
e05f520cdf
actorlib/spi: remove unused function
2013-07-27 15:36:42 +02:00
Sebastien Bourdeauducq
Florent Kermarrec
Nina Engelhardt
user
Nina Engelhardt