Commit Graph

16 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq d2c61e6a90 sim/generic/multiread: do not return spurious items 2012-11-23 23:07:25 +01:00
Sebastien Bourdeauducq e16353a281 Multi-clock design support + new instance API 2012-09-10 23:45:02 +02:00
Sebastien Bourdeauducq 5bf19c155f sim: ensure clean IPC shutdown 2012-08-05 00:16:11 +02:00
Sebastien Bourdeauducq 8de192dfbd x.bv.width -> len(x) 2012-07-13 18:32:54 +02:00
Sebastien Bourdeauducq 8a23451237 PureSimulable 2012-06-12 17:08:56 +02:00
Sebastien Bourdeauducq b145f9e5e2 sim: multiread/multiwrite 2012-06-08 17:52:32 +02:00
Sebastien Bourdeauducq 0b62e573ae sim: pass extra keyword arguments to Verilog converter 2012-04-30 16:38:17 -05:00
Sebastien Bourdeauducq d3c6b8d16f sim/proxy: support lists 2012-04-01 17:19:53 +02:00
Sebastien Bourdeauducq bb864c65dc sim: proxy 2012-03-30 16:40:26 +02:00
Sebastien Bourdeauducq 081b658e2d Update copyright notices 2012-03-23 16:41:30 +01:00
Sebastien Bourdeauducq 8160ced2e9 sim: memory access 2012-03-06 19:29:39 +01:00
Sebastien Bourdeauducq 6f829c7afc sim: support for signed numbers 2012-03-06 16:46:18 +01:00
Sebastien Bourdeauducq 9da512dbf5 sim: VCD generation 2012-03-06 15:26:04 +01:00
Sebastien Bourdeauducq 22b3c11b93 sim: clean startup/shutdown 2012-03-06 15:00:02 +01:00
Sebastien Bourdeauducq 06de17b16c sim: remove temporary files and socket 2012-03-06 14:20:26 +01:00
Sebastien Bourdeauducq aac9752558 sim: basic functionality working 2012-03-05 20:31:41 +01:00