Commit Graph

5847 Commits

Author SHA1 Message Date
Florent Kermarrec 795ff08a20 build/sim/verilator: add regular_comb parameter (that defaults to False) and pass it to get_verilog. 2020-05-27 19:54:52 +02:00
enjoy-digital 25d2e7c92f
Merge pull request #542 from gsomlo/gls-sdcard-followup
software/bios: fixup sdclk command
2020-05-27 19:04:18 +02:00
enjoy-digital 3fd6ecd86e
Merge pull request #541 from antmicro/jboc/spd-read
Add support for I2C to read SPD EEPROM
2020-05-27 19:03:50 +02:00
Florent Kermarrec 68f83cbcaf CHANGES: document deprecated/moved modules. 2020-05-27 18:46:55 +02:00
Florent Kermarrec ab80606036 soc/core/uart: move WishboneStreamingBridge in it and rename to Stream2Wishbone. 2020-05-27 18:40:45 +02:00
Gabriel Somlo 6da98ca14d software/bios: fixup sdclk command 2020-05-27 12:38:59 -04:00
Florent Kermarrec 0a3d649ad8 interconnect/wishbone: integrate Wishbone2CSR. 2020-05-27 18:15:05 +02:00
Florent Kermarrec b5b88d27b5 interconnect/csr_bus: add separators. 2020-05-27 18:13:57 +02:00
Florent Kermarrec 86952a6e06 interconnect/wishbone: remove CSRBank (probably not used by anyone). 2020-05-27 18:04:08 +02:00
Florent Kermarrec e404608cf4 interconnect/wishbone: add separators and move SDRAM/Cache. 2020-05-27 17:59:33 +02:00
Florent Kermarrec 1fddd0e3d3 interconnect/wishbone: simplify DownConverter. 2020-05-27 17:34:11 +02:00
Jędrzej Boczar 1172c10afb bios: move I2C from liblitedram to libbase 2020-05-27 15:37:19 +02:00
Florent Kermarrec e0d2682055 interconnect/wishbone: remove UpConverter (probably not used by anyone and would need to be rewritten).
We'll provide a better implementation if this is useful.
2020-05-27 15:27:33 +02:00
Florent Kermarrec 696b31ed18 tools/litex_sim: switch to SoCCore/add_sdram instead of SoCSDRAM. 2020-05-27 15:16:30 +02:00
Florent Kermarrec 2efcf87925 targets/nexys4ddr: update add_sdcard method.
Tested with:
sdinit
sdtestwrite 0x10 foobar
sdtestread 0x10
2020-05-27 14:09:05 +02:00
Jędrzej Boczar 472bf9ac71 bios/sdram: expose I2C functions 2020-05-27 11:56:59 +02:00
Florent Kermarrec 2934c085ef CHANGES: add JTAG UART. 2020-05-27 09:00:43 +02:00
Florent Kermarrec 3b47d4a479 tools/litex_jtag_uart: add openocd config and telnet port parameters. 2020-05-27 08:59:12 +02:00
Florent Kermarrec 67cf67034c cpus: remove common cpu variants/extensions definition and simplify variant check.
Having common cpu variants/extensions has no real additional value since we are supporting
very various CPUs where minimal/standard/full have different meanings. Checking against
common variants/extensions has also cause more issues recently when adding new CPUs than
the additional value it was supported to provide.

So let's just simplify things: a CPU provide the supported variants and we just check
against that.
2020-05-26 09:36:44 +02:00
Florent Kermarrec 062ff67e12 cpu/microwatt: add standard+ghdl variant that uses GHDL Yosys plugin. 2020-05-26 08:51:33 +02:00
Florent Kermarrec 24687cbd9f tools/litex_client/RemoteClient: add base_address parameter.
Useful when address translation is done in the SoC.
2020-05-25 14:11:14 +02:00
Florent Kermarrec 78a9579e09 cores/uart/RS232PHYTX: fix startbit duration by pre-loading phase_accumulator_tx to tuning_word. 2020-05-25 10:46:53 +02:00
enjoy-digital 370e46529d
Merge pull request #539 from dayjaby/pr-fix_uart_startbit
Fix UART startbit: 1 cycle later
2020-05-25 10:33:58 +02:00
Florent Kermarrec c75cf45ab4 tools: add litex_jtag_uart to create a virtual uart for the jtag uart. 2020-05-25 10:21:06 +02:00
Florent Kermarrec 2cf83b9f69 tools: rename litex_crossover poc to litex_crossover_uart, remove from setup for now. 2020-05-25 10:19:16 +02:00
David Jablonski e853ad4b61 fix uart startbit: 1 cycle later 2020-05-24 16:12:07 +02:00
Florent Kermarrec bed5aafd6c tools: add litex_crossover to be able to use lxterm (and serialboot) over a crossover UART (bridged over UART/Ethernet/PCIe/USB, etc...).
This is still a proof of concept but can be used/tested with:
lxsim --with-etherbone --uart-name=crossover --csr-csv=csr.csv
lxserver --udp --udp-ip=192.168.1.51
lxcrossover (will indicate the virtual_tty)
lxterm virtual_tty
2020-05-24 10:55:25 +02:00
Florent Kermarrec 3833bc3ec3 litex_sim: override uart_name to sim only for serial.
Using uart_name=crossover is useful to simulate crossover mode.
2020-05-24 09:52:56 +02:00
Florent Kermarrec da7fd30847 CHANGES: update. 2020-05-23 18:56:51 +02:00
Florent Kermarrec 2fb52e66b1 integration/soc: remove TODO in header. 2020-05-23 18:54:04 +02:00
Florent Kermarrec b65f18c357 cpu/cv32e40p: fix copyright year. 2020-05-23 18:53:03 +02:00
Florent Kermarrec 30f3517041 cpu/cv32e40p: add copyright and improve indentation. 2020-05-22 15:55:35 +02:00
Florent Kermarrec b23702ecc4 litex_setup/pythondata-cpu-cv32e40p: clone in recursive mode. 2020-05-22 15:43:00 +02:00
enjoy-digital 4c4cd335de
Merge pull request #535 from antmicro/arty-cv32e40p
Add support for the CV32E40P RISC-V CPU
2020-05-22 13:44:10 +02:00
enjoy-digital 7d09ea19ef
Merge pull request #538 from antmicro/fix_libbase
libbase: Include missing uart header
2020-05-22 12:28:00 +02:00
Mateusz Hołenko 9d16b0fc82 libbase: Include missing uart header
This fixes compilation on mor1kx.
2020-05-22 11:43:18 +02:00
Florent Kermarrec 3d06dc028c test/test_targets: update build_test. 2020-05-22 08:42:02 +02:00
Jędrzej Boczar bdc7eb5c48 litex_sim: load SPD data from files in hexdump format as printed in BIOS 2020-05-21 16:20:06 +02:00
Jędrzej Boczar a42dc97401 bios/sdram: add BIOS command for reading SPD 2020-05-21 14:32:31 +02:00
Jędrzej Boczar 8fd3e74ec9 bios/sdram: add firmware for reading SPD EEPROM 2020-05-21 14:07:42 +02:00
Florent Kermarrec 42350f6d83 platforms/targets: keep in sync with litex-boards.
- LedChaser.
- use of soc.build_name in load/flash bitstream.
2020-05-21 09:14:33 +02:00
Florent Kermarrec 2eea786436 build/sim: rename dut to sim (for consistency with other builds). 2020-05-21 09:06:29 +02:00
Florent Kermarrec a6cbbc9d69 integration/soc: set build_name to platform.name when not specified. 2020-05-21 09:05:45 +02:00
Florent Kermarrec 16417cb8f1 software/liblitespi: fix #endif location. 2020-05-20 23:20:45 +02:00
enjoy-digital 9bdb063b3e
Merge pull request #516 from antmicro/i2s_support_arty
Add I2S support to Arty
2020-05-20 19:49:42 +02:00
enjoy-digital c2e9a26ea8
Merge pull request #534 from fjullien/fix_litex_sim_warn
litex/sim: fix compiler warnings
2020-05-20 19:49:04 +02:00
Franck Jullien 7c5f56c207 litex/sim: fix compiler warnings 2020-05-20 15:34:19 +02:00
Pawel Sagan ce49990084 Extend I2S capabilities
This commit:
* adds the support for I2S standard mode,
* extends I2S left justified mode,
* allows to configure sample size for tx/rx in 1-32 bits range,
* implements I2S master mode,
* allows to concatenate channels or used the padded mode.

This required to rework the FSM.
2020-05-20 14:31:51 +02:00
Piotr Binkowski 2d6ee5aaf2 cores/cpu: add cv32e40p 2020-05-20 13:46:37 +02:00
Piotr Binkowski ca8cb83424 software/bios/isr: add support for cv32e40p 2020-05-20 13:46:37 +02:00