54f729fbc1
Lattice: Fix port names in SDR{in/out} Impl
...
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2021-04-25 19:47:30 +02:00
22d763ee11
tools/litex_sim: Remove self.add_csr calls no longer required.
2021-04-23 19:33:51 +02:00
8c8c1fe6e0
tools/litex_sim: Fix cpu in configuration (allow list of supported CPU to be listed when invalid cpu_type is provided).
2021-04-23 19:16:18 +02:00
116c2f1549
cores/cpu: Cosmetic cleanups.
2021-04-23 16:16:31 +02:00
fe7029a7e0
software/liblitedram: Add missing read window re-centering after selecting bitslip in Write DQ-DQS training.
2021-04-22 17:08:20 +02:00
447d2648e8
Merge pull request #884 from antmicro/jboc/dq-dqs-training
...
Write DQ-DQS training
2021-04-22 17:08:08 +02:00
0ed7852779
tools/litex_term: Add time.sleep on BridgeUART to avoid high CPU usage.
2021-04-22 17:07:33 +02:00
75045914b4
global: Bump copyright year.
2021-04-22 17:07:29 +02:00
b55af2156b
soc/add_sdcard: Fix cmd_done signal.
2021-04-21 13:38:00 +02:00
482bd61ea5
Merge pull request #887 from paulusmack/master
...
integration/soc/add_sdcard: Add an interrupt for command completion
2021-04-21 11:00:55 +02:00
e6765f847d
integration/soc/add_sdcard: Add an interrupt for command completion
...
This is useful for long-running commands generally and in particular
for those without any data transfer, such as erase. It is a
level-sensitive interrupt because that makes it a little harder to
lose interrupts due to incorrect programming.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2021-04-21 09:00:31 +10:00
2ac7e0b978
software/liblitesdcard: Update with LiteSDCard changes (SDCARD_CTRL_RESPONSE_SHORT_BUSY is now directly a supported command).
2021-04-20 14:30:28 +02:00
b29515bd1d
Merge pull request #885 from paulusmack/master
...
software/liblitesdcard: Tell the controller when to wait while the card is busy
2021-04-20 14:30:08 +02:00
eea63968d2
Merge pull request #877 from rdolbeau/eth_int_fix
...
Fix interrupt issue with ethernet on recent Linux-On-Litex-Vexriscv/SMP
2021-04-19 18:12:01 +02:00
49c4d735c5
software/liblitesdcard: Tell the controller when to wait while the card is busy
...
Bit 2 of the command register now tells the controller to wait while
the card is indicating that it is busy (by pulling the DAT0 line low).
The card can do this for commands 7 and 12 and app command 41 (and
also for commands 20, 28, 29, 38 and 43, but we don't use those here.)
This sets bit 2 for those commands.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2021-04-19 09:12:13 +10:00
2a5973b21f
soc/software/liblitedram: refactor centering code into more generic function
2021-04-16 15:41:24 +02:00
76d121ea36
soc/software/liblitedram: add DQ-DQS training procedure
2021-04-16 11:50:38 +02:00
f310dd52f3
Fix interrupt issue with ethernet on recent Linux-On-Litex-Vexriscv/SMP
...
It seems an overreaching 'interrupt-parent' caused trouble to interrupt routing.
This moves 'interrupt-parent' to the SoC entry.
2021-04-15 10:06:53 +02:00
8ef7353fe5
Add interactivity option to simulation
2021-04-14 13:39:47 +02:00
246142256b
Merge pull request #880 from betrusted-io/issue-862
...
resolve issue #862 add description to soc.svd
2021-04-14 08:58:42 +02:00
01479ed541
Merge pull request #879 from betrusted-io/timer-doc
...
use AutoDoc for timer documentation
2021-04-14 08:56:37 +02:00
f014e4cbd2
tools/litex_client: Add filter parameter to dump_registrers to only dump/display the filtered registers:
...
ex: litex_cli --regs --filter=pcie_phy will only dump/display pcie_phy registers.
2021-04-13 13:44:41 +02:00
1b78b12024
resolve feedback on import location
2021-04-12 22:27:22 +08:00
ab0aab6913
resolve issue #862 add description to soc.svd
...
The issue is that with no description provided it simply would
not put out a description tag, which breaks compatibility with
other programs.
Insert a somewhat useful default description including a timestamp
and the words "LiteX SoC".
2021-04-12 22:08:05 +08:00
2bb830bb69
use AutoDoc for timer documentation
...
Not sure why nobody else saw this, but sometime in the last month's
patches sphinx started throwing an error when building docs for
the timer block. The problem is that the body and title are 'None'
and the doc code tries to invoke methods on None.
Changing the doc methodology to AutoDoc and explicitly creating the intro
section fixes this.
2021-04-12 21:53:05 +08:00
5011b564c3
integration/soc: Add _ prefix to build_name when build_name starts with digit (Invalid verilog top level name).
2021-04-12 08:32:05 +02:00
15cf4d75e9
software/liblitesdcard: Add SDCARD_CMD25_SUPPORT #define to allow disabling/enabling Multiple Block Writes and implement Multiple Block Writes.
2021-04-09 19:34:13 +02:00
5cdf621367
software/liblitesdcard: Add SDCARD_CMD18_SUPPORT #define to allow disabling/enabling Multiple Block Reads.
...
Also use Single Block Read when only 1 block to read, avoid stop transmission.
2021-04-09 19:17:32 +02:00
9bec0ce7a2
soc/add_ethernet: Add with_timestamp parameter to enable Timestamping and use timer0.uptime_cycles as Timestamp source.
2021-04-08 14:37:48 +02:00
7caed56790
cores/timer: Expose uptime_cycles and allow multiple calls to add_uptime.
2021-04-08 14:36:10 +02:00
dbe09341c0
soc/add_pcie: Remove duplicate assert (already checked by check_if_exists).
2021-04-08 12:19:56 +02:00
37a81b145a
Merge pull request #875 from rdolbeau/reserve_fb_memory
...
json2dts: add the framebuffer memory in the 'reserved-memory' entry, …
2021-04-07 12:17:00 +02:00
e5e472d469
soc/software: Remove SoCController dependency for BIOS compilation.
2021-04-07 10:45:43 +02:00
02328e5236
integration/soc: Add check_bios_requirements method and check for ctrl, timer0, rom and sram presence in the SoC when using the BIOS.
2021-04-07 10:37:48 +02:00
6940db7730
software/bios: Fix compilation without UART.
2021-04-07 09:03:07 +02:00
dac6c1cbb1
json2dts: add the framebuffer memory in the 'reserved-memory' entry, so that Linux doesn't try to use it for something else.
2021-04-06 13:44:50 +02:00
8db1a619f5
Merge pull request #874 from chmousset/enh/ECP5DifferentialInput
...
[enh] ECP5 DIfferential input support
2021-04-06 12:27:33 +02:00
4500641d78
Merge pull request #873 from sthornington/master
...
Fix yosys read command for SystemVerilog sources
2021-04-06 12:08:07 +02:00
f89492333e
Merge pull request #871 from rdolbeau/640x480_60hz
...
640x480@60Hz (lowest bandwidth option yet)
2021-04-06 12:07:08 +02:00
51ea0c0427
[enh] ECP5 DIfferential input support
2021-04-05 17:24:51 +02:00
4b0a359675
Fix yosys read command for SystemVerilog sources
2021-04-05 10:37:17 -04:00
3addd587b6
640x480@60Hz (lowest bandwidth option yet)
2021-04-04 17:20:53 +02:00
080ecad522
cpu/vexriscv_smp: Add specialization of the RAM implementation based on the FPGA family (Platform).
...
RAMXilinx was not infered correctly on Intel/Altera devices, we now have an Intel/Altera specific
implementation and could add other specific implementations in the future if required.
2021-03-30 11:10:05 +02:00
70d11974fc
cores/video/framebuffer: Add support for video clock faster than sys_clk with DRAM's data-width > 32.
...
In this, CDC has to be done first and Data-width conversion is then done in Video clock domain.
2021-03-30 10:14:10 +02:00
c182f4db5f
cores/video: Add check of Video Timings and list available ones when not supported.
2021-03-30 09:15:17 +02:00
2ed5f14e9e
integration/soc/soc_core: Remove --min-l2-data-width and --max-sdram-size that don't need to be configurable but can just be enforced in the target file.
2021-03-29 11:26:29 +02:00
ac7857fa4f
cores/video/add_video_framebuffer: Add workaround when SDRAM data_width < 32.
2021-03-29 11:25:34 +02:00
4a29e2403c
integration/soc/add_sdram: Directly use main_ram mem_map mapping if available.
2021-03-29 11:22:31 +02:00
99a26fc710
integration/soc/add_video_framebuffer: Modify default framebuffer base address.
2021-03-29 10:59:32 +02:00
bf999cfeac
cores/Video: Expose fifo_depth and add underflow signal that can be used investigate bandwidth issues.
2021-03-29 10:58:31 +02:00
Karol Gugala
Florent Kermarrec
Paul Mackerras
Jędrzej Boczar
Romain Dolbeau
developandplay
bunnie
Charles-Henri Mousset
Simon Thornington