Gwenhael Goavec-Merou
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3d9db91387
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build/colognechip/colognechip: add missing p_r option (-cCP)
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2024-02-28 17:17:42 +01:00 |
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Gwenhael Goavec-Merou
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83c1adbc94
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soc/cores/clock/colognechip: set lock_req to 1 by default and connect locked to USR_PLL_LOCKED_STDY
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2024-02-28 17:17:06 +01:00 |
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Gwenhael Goavec-Merou
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54d19265a7
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build/colognechip/platform: typo bitstream_ext -> _bitstream_ext
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2024-02-28 16:12:30 +01:00 |
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Gwenhael Goavec-Merou
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8eb5e7b6c1
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soc/cores/clock/colognechip: REF_CLK/OUT_CLK: int -> str
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2024-02-28 16:11:27 +01:00 |
Florent Kermarrec
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cd8ad3714d
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soc/interconnect/packet/Dispatcher: Add missing **kwargs.
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2024-02-28 13:32:09 +01:00 |
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Florent Kermarrec
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42c1046323
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soc/interconnect/packet: Add **kwargs to Arbiter/Dispatcher to allow specifying keep/omit parameters for connection.
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2024-02-28 13:04:48 +01:00 |
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Florent Kermarrec
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fea3a7ebc6
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cpu/naxriscv/core/git_setup: Clone submodules as recursive to prevent errors with submodules during the git checkout.
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2024-02-27 15:59:44 +01:00 |
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Florent Kermarrec
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253d1cfb9b
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build/generic_platform/ConstraintManager: Add prepend parameter to add_extension.
In some cases, prepend is useful when we want to replace existing IOs.
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2024-02-26 17:28:03 +01:00 |
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Florent Kermarrec
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d3ea912339
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CHANGES: Update.
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2024-02-22 10:24:35 +01:00 |
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enjoy-digital
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7f91baae3a
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Merge pull request #1894 from mdejw/patch-1
Send serial data to sim uart only if rx_ready is set.
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2024-02-22 10:22:05 +01:00 |
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enjoy-digital
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dc229f8df9
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Merge pull request #1895 from trabucayre/json2dts_linux_fill_network
tools/litex_json2dts_linux.py: adding ip= bootarg when localip and remoteip are provided
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2024-02-22 10:20:41 +01:00 |
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Gwenhael Goavec-Merou
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a6d015a358
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tools/litex_json2dts_linux.py: adding ip= bootarg when localip and remoteip are provided
Signed-off-by: Gwenhael Goavec-Merou <gwenhael@enjoy-digital.fr>
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2024-02-22 09:40:26 +01:00 |
Marcin Dawidowicz
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0de87ce40d
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Send serial data to sim uart only if rx_ready is set.
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2024-02-21 22:32:49 +01:00 |
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Florent Kermarrec
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63f9935f17
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build/sim/config: Convert periods_ps to int since otherwise too restrictive on possible frequencies generation.
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2024-02-21 11:39:49 +01:00 |
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Florent Kermarrec
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129446dea2
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test/test_wishbone: Run all Remapper tests in byte and word modes and simplify.
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2024-02-21 11:20:01 +01:00 |
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Florent Kermarrec
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c1dad9516a
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interconnect/wishbone/Remapper: Shift origin when in word mode, fixes unit-test.
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2024-02-21 11:06:15 +01:00 |
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Florent Kermarrec
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6213fd2151
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test/test_wishbone: Add Remapper unit-test for word addressing mode.
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2024-02-21 11:05:35 +01:00 |
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Florent Kermarrec
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c0517cd1cf
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interconnect/axi: Use same default parameters than wishbone.Remapper.
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2024-02-20 16:58:37 +01:00 |
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Florent Kermarrec
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d1e73889f9
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test/test_wishbone: Add wishbone.Remapper basic tests.
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2024-02-20 16:51:32 +01:00 |
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Florent Kermarrec
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ef256c9cc2
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interconnect/wishbone: Enhance Remapper to also integrate RegionsRemapper functionnality and apply operation sequentially.
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2024-02-20 16:50:56 +01:00 |
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Florent Kermarrec
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d78dbd6935
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soc/add_spi_flash: Revert PHY_FREQUENCY definition and use in BIOS.
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2024-02-20 14:23:54 +01:00 |
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Gwenhael Goavec-Merou
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03340bcf12
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soc/software/liblitespi/spiflash: replace SPIFLASH_PHY_FREQUENCY by CONFIG_CLOCK_FREQUENCY (removed by commit e498a56698)
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2024-02-19 06:34:26 +01:00 |
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enjoy-digital
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677443cef7
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Merge pull request #1890 from rtucker85/fix_csr_merge
Fixes for errors when attempting import of Sub-SoCs .json
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2024-02-16 18:27:39 +01:00 |
Richard Tucker
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6c8633b9a3
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soc/integration/builder: add_json: fix order of parameters
For consistancy only. This now matches load_csr_json.
Link: https://git.motec.com.au/id/Ibe2889fafc6ef48a6f217f84246de11a9555811d
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2024-02-16 16:59:14 +11:00 |
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Richard Tucker
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d4c1c97cf9
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soc/integration/export: fix incorrect element in get_linker_regions
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2024-02-16 15:38:48 +11:00 |
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Florent Kermarrec
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cfbe3b028a
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interconnect/wishbone/RegionsRemapper: Add default values for src_regions/dst_regions.
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2024-02-13 19:13:00 +01:00 |
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Florent Kermarrec
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595118fd5d
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interconnect/wishbone/RegionsRemapper: Connect adr by default when no remapping.
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2024-02-13 18:31:05 +01:00 |
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Florent Kermarrec
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5ee746f178
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interconnect/wishbone: Add initial RegionsRemapper to allow remapping source regions to destination regions.
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2024-02-13 18:25:46 +01:00 |
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Florent Kermarrec
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19db80ec9b
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interconnect/Remapper: Add docstring description.
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2024-02-13 17:44:02 +01:00 |
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Florent Kermarrec
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fe0363da25
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CHANGES.md: Update.
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2024-02-13 16:04:13 +01:00 |
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Florent Kermarrec
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bd7921cda8
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soc/add_master: Add region support to allow remapping.
Allow connecting a master to a specific region of the SoC and limiting access to it.
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2024-02-13 15:59:42 +01:00 |
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Florent Kermarrec
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36767c66b4
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soc/SoCRegion: Ensure fixed indentation in __str__.
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2024-02-13 14:52:29 +01:00 |
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enjoy-digital
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46a2e6fe78
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Merge pull request #1887 from Dolu1990/jtag
tools/litex_sim support for remote_bitbang (openocd)
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2024-02-13 14:29:11 +01:00 |
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enjoy-digital
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89bf0fb0cf
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Merge pull request #1888 from Dolu1990/reset_vector
core/vexriscv_smp add reset vector support
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2024-02-13 11:43:40 +01:00 |
Dolu1990
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795fa1e1fc
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core/vexriscv_smp add reset vector support
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2024-02-13 11:22:05 +01:00 |
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Dolu1990
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0a315cda2d
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Merge branch 'master' into jtag
# Conflicts:
# litex/soc/cores/cpu/vexriscv_smp/core.py
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2024-02-13 10:41:26 +01:00 |
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Dolu1990
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fe37dcf6dd
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tools/litex_sim now support remote_bitbang (openocd)
soc/cores/vexriscv_smp add jtag tap support
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2024-02-13 10:35:53 +01:00 |
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Florent Kermarrec
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f36e7d379a
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CHANGES.md: Update.
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2024-02-12 17:21:42 +01:00 |
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Florent Kermarrec
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244bc43886
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soc/integration/builder: Add add_json method to allow adding exported .json from Sub-SoCs.
Ex: builder.add_json("icebreaker_soc.json", 0x30000000, "icebreaker_soc") to import/merge
a SoC's json file from a Sub-SoC in Main-SoC.
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2024-02-12 17:19:04 +01:00 |
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Florent Kermarrec
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38ff48a543
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soc/integration/export: Add load_csr_json function to load/import .json exports.
Useful to merge SoC/Sub-SoCs Constants/CSRs/Memory Regions.
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2024-02-12 17:16:54 +01:00 |
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Florent Kermarrec
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1b32d8a341
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soc/add_etherbone: Revert sys_clk domain renaming when ethmac is disabled.
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2024-02-09 15:10:47 +01:00 |
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Florent Kermarrec
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afcf78f643
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soc/add_etherbone: Rename ethmac parameters with ethmac suffix since related to ethmac.
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2024-02-07 19:21:38 +01:00 |
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enjoy-digital
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0ed44a2c04
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Merge pull request #1886 from trabucayre/etherbone_hybrid_ip_mac
Etherbone hybrid ip mac
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2024-02-07 14:15:42 +01:00 |
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Gwenhael Goavec-Merou
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7f211048ac
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soc/integration/soc/add_etherbone: adding ethernet mac address, local/remote ip as parameters, sanity check when hybrid mode and adding ip/mac constants
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2024-02-07 12:49:03 +01:00 |
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Gwenhael Goavec-Merou
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177df0b57e
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soc/integration/soc: move add_ip_constant to helpers with a renaming to add_ip_address_constants, adding function to add MACADDRx constant
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2024-02-07 12:44:59 +01:00 |
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Gwenhael Goavec-Merou
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e866892798
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soc/software/bios/boot: allow to override macaddr by using constant MACADDRx
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2024-02-07 11:16:12 +01:00 |
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Gwenhael Goavec-Merou
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13c57e8304
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soc/integration/soc: add_etherbone/ClockDomainRenamer: keep sys connected to sys instead of eth rx
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2024-02-07 07:21:35 +01:00 |
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Florent Kermarrec
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57bc0369c7
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integration/soc/SocCSRHandler: Make supported_address_width/paging values explicit.
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2024-02-05 12:57:06 +01:00 |
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enjoy-digital
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88e530d0e8
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Merge pull request #1885 from smunaut/csr-paging-0x400
soc/integration: Allow 0x400 CSR paging
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2024-02-05 12:44:51 +01:00 |
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enjoy-digital
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cd1088dbe9
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Merge pull request #1884 from motec-research/efinix_spi_width
Efinix: suport spi width for passive loading
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2024-02-05 12:43:30 +01:00 |