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285 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 2a3803d3a1 videostream: add single chopper 2014-02-09 00:53:30 +01:00
Sebastien Bourdeauducq b6a00e86e4 videostream: add compacter and packer 2014-02-08 18:39:01 +01:00
Sebastien Bourdeauducq 25acf17312 Refresh testbenches and convert to new API 2014-01-28 13:50:01 +01:00
Sebastien Bourdeauducq e464935119 downscaler: add chopper module 2014-01-21 15:56:51 +01:00
Sebastien Bourdeauducq ad974a07ef gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
Sebastien Bourdeauducq c95b9d6d76 gensoc: use add_verilog_include_path 2013-12-12 23:17:16 +01:00
Sebastien Bourdeauducq 55a39269d2 gpio: add InOut 2013-12-06 00:06:53 +01:00
Sebastien Bourdeauducq cfb9074755 norflash16: fix LSB 2013-11-30 23:06:51 +01:00
Sebastien Bourdeauducq 352919d17e norflash: add support for writes 2013-11-30 20:37:56 +01:00
Robert Jordens 5953f901c8 spiflash: add read-only variable data width spi flash 
Signed-off-by: Robert Jordens <jordens@gmail.com>
 2013-11-25 14:23:55 +01:00
Sebastien Bourdeauducq 96600ad9d7 set LM32 reset address 2013-11-25 12:09:16 +01:00
Sebastien Bourdeauducq 7459a849ee IntegratedBIOS: read only 2013-11-25 10:25:05 +01:00
Sebastien Bourdeauducq 78cd7a288e move integrated BIOS code to gensoc 2013-11-25 10:22:14 +01:00
Sebastien Bourdeauducq b212e0279d gensoc: add Papilio Pro ID 2013-11-24 23:50:33 +01:00
Sebastien Bourdeauducq 257185cc9c rename create_sdram_modules and add register_rom 2013-11-24 20:16:19 +01:00
Sebastien Bourdeauducq fca0b968e7 generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00
Sebastien Bourdeauducq fdff1ae5f8 make build system more generic 2013-11-24 13:37:32 +01:00
Sebastien Bourdeauducq 4a3a1d02e9 modularize SoC integration 2013-11-24 10:30:02 +01:00
Sebastien Bourdeauducq 7496ba6360 framebuffer: fix resynchronization after resolution change 2013-11-21 00:33:22 +01:00
Sebastien Bourdeauducq 96fcb3574e Revert "framebuffer: reset VTG" 
This reverts commit 6cb18f5ce3.

Conflicts:
	misoclib/framebuffer/__init__.py
	misoclib/framebuffer/format.py
 2013-11-19 23:48:00 +01:00
Sebastien Bourdeauducq 2eabf97147 dvisampler: transfer the last word in frames correctly 2013-11-19 23:38:48 +01:00
Sebastien Bourdeauducq de76e91147 framebuffer: expose PLL DRP to CSR 2013-11-18 20:32:33 +01:00
Sebastien Bourdeauducq 9e883b8b02 dvisampler: expose PLL DRP to CSR 2013-11-18 20:32:21 +01:00
Sebastien Bourdeauducq 4cfcda6c8c framebuffer: unpack memory words in pixel clock domain for better perf 2013-11-17 23:41:18 +01:00
Sebastien Bourdeauducq c3d0985fb2 add L2 cache size in identifier + function to flush L2 2013-11-16 16:27:21 +01:00
Sebastien Bourdeauducq 6f990a017e dvisampler: pack pixels in pixel clock domain to improve performance 2013-11-16 13:53:26 +01:00
Sebastien Bourdeauducq 6cb18f5ce3 framebuffer: reset VTG 2013-11-15 11:25:07 +01:00
Sebastien Bourdeauducq 34e8e8c259 dvisampler: update address CSR at end of DMA 2013-11-13 18:57:10 +01:00
Sebastien Bourdeauducq 15499560b5 cpuif: add memories to csr.h 2013-11-11 16:53:00 +01:00
Sebastien Bourdeauducq 75d25af3aa cosmetic changes 2013-11-10 16:12:24 +01:00
Robert Jordens 31ec33dbad s6ddrphy: use shorter Instance argument notation 
Signed-off-by: Robert Jordens <jordens@gmail.com>
 2013-11-10 12:52:03 +01:00
Robert Jordens c1e5683ba2 s6ddrphy: drop unused outputs, shortens verilog and produces more readable warnings 
Signed-off-by: Robert Jordens <jordens@gmail.com>
 2013-11-10 11:13:36 +01:00
Robert Jordens 05944cf909 cpuif.py: add _ADDR and _SIZE defines for each register 
Signed-off-by: Robert Jordens <jordens@gmail.com>
 2013-11-10 10:44:39 +01:00
Sebastien Bourdeauducq d7a4d8b66e use git commit id as version 2013-11-09 16:38:44 +01:00
Sebastien Bourdeauducq 0b881d934f rename milkymist-ng to MiSoC 2013-11-09 15:27:32 +01:00