737ed9d658
setup: remove litex_simple setup from entry points.
...
Now provided by LiteX-Boards: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/simple.py
2021-01-12 17:21:26 +01:00
c79135c573
software/demo: add litex_bare_metal_demo pre-installed script.
...
Build demo: litex_bare_metal_demo --build-path=build/arty/
2020-12-21 19:27:21 +01:00
ee41fbb338
tools: deprecate litex_jtag_uart (now directly integrated in litex_term).
2020-12-10 15:48:10 +01:00
1976fd4b90
tools: deprecate litex_crossover_uart (now directly integrated in litex_term).
2020-12-10 13:54:21 +01:00
0dec446434
tools/litex_client: add utils to dump FPGA identifier and registers and expose it as litex_cli.
...
Dump FPGA identifier: litex_cli --ident
Dump FPGA registers: litex_cli --regs
2020-10-22 17:45:45 +02:00
aed0dcee4c
setup: add litex_json2dts to console_scripts.
2020-08-04 16:07:53 +02:00
2ae55e8009
setup.py: add litex_jtag_uart and litex_crossover_uart to console_scripts.
2020-05-29 10:40:17 +02:00
2cf83b9f69
tools: rename litex_crossover poc to litex_crossover_uart, remove from setup for now.
2020-05-25 10:19:16 +02:00
bed5aafd6c
tools: add litex_crossover to be able to use lxterm (and serialboot) over a crossover UART (bridged over UART/Ethernet/PCIe/USB, etc...).
...
This is still a proof of concept but can be used/tested with:
lxsim --with-etherbone --uart-name=crossover --csr-csv=csr.csv
lxserver --udp --udp-ip=192.168.1.51
lxcrossover (will indicate the virtual_tty)
lxterm virtual_tty
2020-05-24 10:55:25 +02:00
317ea7edd1
Merge branch 'master' into litex-sm2py
2020-04-27 22:24:10 +02:00
2d01882653
setup.py/install_requires: add requests.
2020-04-15 09:27:26 +02:00
ebcb2a4406
Rename litex-data-XXX-YYY to pythondata-XXX-YYY
2020-04-11 18:37:06 -07:00
ac3fd794f9
Adding missing comma.
2020-04-11 18:37:06 -07:00
3df6c0c8a2
Adding litex-data-software-compiler_rt as a required package.
2020-04-11 18:37:06 -07:00
30d25ffe5b
setup.py: simplify, switch to Python3.6+ (using python_requires), remove version.
...
- Deprecate Python 3.5, switch to Python 3.6+.
- Remove which was not used or updated. We'll see to get this back when working on releases.
2020-04-07 11:48:16 +02:00
d702c0fe35
setup.py: update long_description
2019-11-30 19:30:50 +01:00
5318bcd3c3
setup.py: add migen to install_requires
2019-06-12 11:26:57 +02:00
f0fe9f3cdf
setup.py: add short names for tools
2019-04-23 17:46:20 +02:00
9ee6c35b42
tools: move from litex.soc.tools to litex.tools and fix usb.core import
2019-04-20 10:44:53 +02:00
a25645afa6
utils: add litex_read_verilog utility
...
generate Migen's modules from verilog files
2018-11-16 16:09:44 +01:00
a538d36268
create utils directory and move the litex utils to it
2018-11-16 14:37:19 +01:00
0d2d3959f1
setup.py: add litex_simple exec (to ease building simple design)
2018-09-24 01:24:51 +02:00
9cfae4dfde
setup.py: create litex_sim exec to ease simulation
2018-09-06 08:48:14 +02:00
fb145daced
tools: remove vexriscv_debug
...
This program is no longer needed.
The `openocd_vexriscv` package natively supports `etherbone`, and now
that the vexriscv debug module is available on Wishbone instead of as a
CSR, this module no longer works.
This change simplifies both tooling (because there is one fewer program
to run) and integration (because you don't need to modify your CSRs
anymore, just `register_mem()`.)
Signed-off-by: Sean Cross <sean@xobs.io>
2018-07-27 15:25:33 +08:00
ae62fe076c
setup.pu: fix exclude
2018-07-19 11:35:50 +02:00
b19844d196
setup.py: exclude test, sim, doc directories
2018-07-18 09:37:38 +02:00
6bc9265c2b
setup: add vexriscv_debug to list of entrypoints
...
Add the vexriscv_debug program to the list of scripts created when
installing this module. This program is a simple bridge that allows
openocd to talk to the vexriscv core so it can be debugged.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-07-06 16:22:11 +08:00
212e1a7076
bump to 0.2.dev
2018-02-23 13:36:32 +01:00
64aa4ae4c0
uniformize with litex cores and make things more clear about what LiteX vs Migen/MiSoC
2018-02-22 11:52:10 +01:00
99cf4d9f26
add pyserial to the package requirements
...
litex_term requires pyserial
2018-01-11 17:43:16 +11:00
96898f1b39
add test directory with test_code_8b10b.py (from misoc)
2017-04-24 18:46:55 +02:00
8efd57f766
setup.py: remove litex_client from console_scripts, we just need to import RemoteClient in our test scripts
2016-06-29 23:29:45 +02:00
5fb0fe925e
setup.py: fix version (0.1)
2016-04-29 14:39:14 +02:00
601c91a3e2
soc/tools: rename to litex_term, litex_server, litex_client
2016-01-16 21:22:21 +01:00
71483b8935
soc/tools: initialize wishbone remote control (for now only uart)
2015-11-17 01:05:52 +01:00
6a0f85dc42
litex: reorganize things, first work working version
2015-11-07 17:48:55 +01:00
180ba95dd4
setup.py: consistent version number
2015-11-04 16:47:33 +08:00
af88a7a3f9
setup: simpler version check, beta status
2015-09-24 16:08:39 +08:00
8935ca2c9f
setup: remove unneeded import
2015-09-23 09:52:24 +08:00
8421549935
README.md->rst
2015-09-23 00:55:37 +08:00
6005548df6
setup.py: cleanup
2015-09-22 17:27:27 +08:00
74b0cfc83b
doc: remove outdated or moved parts, cleanup
2015-09-20 16:10:40 +08:00
57102ec160
setup.py: valid version number (fixes issue #12 )
2015-05-28 15:43:31 +08:00
69764f2e22
global: pep8 (E401)
2015-04-13 20:54:19 +02:00
17e5249be0
global: pep8 (replace tabs with spaces)
2015-04-13 20:07:07 +02:00
09ebcc47aa
setup.py: fix README filename
2014-09-12 08:19:05 +08:00
d26330a9b9
Update doc with new simulation API
2014-02-07 23:08:59 +01:00
cbab9d2bff
setup.py: update repository address
2013-11-29 23:26:52 +01:00
cb5e0953aa
migen/test: start unittests
2013-11-29 23:11:23 +01:00
c1fe6d1633
setup.py: change license to BSD
2013-08-01 17:46:46 +02:00
Florent Kermarrec
Tim 'mithro' Ansell
Sean Cross
Felix Held
Sebastien Bourdeauducq
Sebastien Bourdeauducq
Robert Jördens