Sebastien Bourdeauducq
|
a67b4baa0c
|
sim: VCD output support
|
2015-09-21 21:20:31 +08:00 |
Sebastien Bourdeauducq
|
7f767095ec
|
sim: support generators yielding statements
|
2015-09-20 15:04:15 +08:00 |
Sebastien Bourdeauducq
|
336728413a
|
simplify imports, migen.fhdl.std -> migen
|
2015-09-12 19:34:07 +08:00 |
Sebastien Bourdeauducq
|
fd986210f8
|
simulator: support generators
|
2015-09-10 21:44:14 -07:00 |
Sebastien Bourdeauducq
|
91ab3f0d01
|
remove genlib.misc.optree (use reduce instead)
|
2015-09-10 13:56:56 -07:00 |
Florent Kermarrec
|
1051878f4c
|
global: pep8 (E302)
|
2015-04-13 20:45:35 +02:00 |
Florent Kermarrec
|
17e5249be0
|
global: pep8 (replace tabs with spaces)
|
2015-04-13 20:07:07 +02:00 |
Florent Kermarrec
|
dbaeaf7833
|
remove trailing whitespaces
|
2014-10-17 17:08:46 +08:00 |
Sebastien Bourdeauducq
|
63c1d7e4b7
|
New simulation API
|
2014-01-26 22:19:43 +01:00 |
Sebastien Bourdeauducq
|
70ffe86356
|
New migen.fhdl.std to simplify imports + len->flen
|
2013-05-22 17:11:09 +02:00 |
Sebastien Bourdeauducq
|
b38818eb17
|
examples/sim/fir: convert to new API
|
2013-03-19 11:46:27 +01:00 |
Sebastien Bourdeauducq
|
51bec340ab
|
sim: remove PureSimulable (superseded by Module)
|
2013-03-15 19:41:30 +01:00 |
Sebastien Bourdeauducq
|
3a591c358c
|
examples/fir: better filter
|
2013-02-22 23:19:56 +01:00 |
Sebastien Bourdeauducq
|
f9acee4e68
|
corelogic -> genlib
|
2013-02-22 23:19:37 +01:00 |
Sebastien Bourdeauducq
|
92b67df41c
|
sim: default runner to Icarus Verilog
|
2013-02-09 17:04:53 +01:00 |
Sebastien Bourdeauducq
|
50ed73c937
|
New specification for width and signedness
|
2012-11-29 21:22:38 +01:00 |
Sebastien Bourdeauducq
|
5bf19c155f
|
sim: ensure clean IPC shutdown
|
2012-08-05 00:16:11 +02:00 |
Sebastien Bourdeauducq
|
973c00938d
|
Reorganize examples folder
|
2012-06-12 17:49:50 +02:00 |