Commit Graph

3306 Commits

Author SHA1 Message Date
numato 09b33346be Removed drive strength constraints on VGA/Audio signals 2015-07-14 23:00:26 +02:00
Robert Jordens 6468fa3db4 xilinx: ensure we chdir() back after build 2015-07-14 12:53:43 -06:00
Sebastien Bourdeauducq 52bdc29528 mimasv2: style, consistency with other boards 2015-07-14 19:56:00 +02:00
numato e56d80c7a0 Adding support for Numato Lab Mimas V2 platform 2015-07-14 19:42:51 +02:00
Sebastien Bourdeauducq ea8ffd8e80 platforms/kc705: style 2015-07-14 19:42:44 +02:00
Florent Kermarrec 35250f5b11 bios: add romboot
When firmware is small enough, it can be interesting to run code from an embedded blockram memory (faster and not impacted by memory controller activity).
It can also be a fallback option in case boot from flash failed.
To use this, define ROM_BOOT_ADDRESS and initialize the blockram with the firmware data.
2015-07-14 18:01:44 +02:00
Florent Kermarrec 6c13879fb6 make.py: use sys.path.insert(0...) to allow external designs to have specific targets derived from a base target 2015-07-13 17:25:50 +02:00
Florent Kermarrec 4dca66b23d misoclib/video/dvisampler: add fifo_depth parameter 2015-07-13 11:03:33 +02:00
Florent Kermarrec e6da1d16b2 wishbone2lasmi: fix "READ_DATA" state 2015-07-09 10:40:32 +02:00
Robert Jordens 8d6aa82082 mibuild/openocd.py: add support
Tested with pipistrello and kc705. Needs patches from
https://github.com/jordens/openocd/tree/bscan_spi waiting
to be merged in the openocd queue.
2015-07-07 21:01:31 -06:00
Florent Kermarrec d244eba583 tools/flterm.py: fix kernel-adr support 2015-07-07 14:58:49 +02:00
Florent Kermarrec 0545d49294 liteeth/core: add with_icmp parameter 2015-07-06 21:31:20 +02:00
Florent Kermarrec e011f9378f use sets for leave_out 2015-07-05 22:49:23 +02:00
Florent Kermarrec c100ef6406 liteeth/core/mac: adapt depth on AsyncFIFOs according to phy (reduce ressource usage with MII phy) 2015-07-05 22:45:53 +02:00
Florent Kermarrec c1ca928ec2 liteeth: small logic optimizations on mac (eases timings on spartan6) 2015-07-05 12:31:52 +02:00
Sebastien Bourdeauducq 73ea404380 Merge branch 'master' of https://github.com/m-labs/migen 2015-07-05 10:53:32 +02:00
Tim 'mithro' Ansell 1d1f8510d3 Allow using non-milkymist cables with UrJTAG. 2015-07-05 10:53:09 +02:00
Florent Kermarrec 23541b5949 software/bios: call eth_mode only if we have an ethernet mac (we don't need to call it when we have a hardware UDP/IP stack) 2015-07-04 21:04:23 +02:00
Yann Sionneau 10eb07526d bios: show memtest command in help 2015-07-02 17:20:06 +02:00
Tim 'mithro' Ansell 0df9c16e69 mibuild: Adding error checking around xsvf generation 2015-07-02 16:51:03 +02:00
Tim 'mithro' Ansell 8daf5e32c1 Adding support for programming with FPGALink
Steps for getting it set up.

 * Get libfpgalink dependencies
   sudo apt-get install \
      build-essential libreadline-dev libusb-1.0-0-dev python-yaml

 * Build libfpgalink
   wget -qO- http://tiny.cc/msbil | tar zxf -
   cd makestuff; ./scripts/msget.sh makestuff/common
   cd libs; ../scripts/msget.sh libfpgalink
   cd libfpgalink; make deps

 * Convert libfpgalink to python3
   wget -O - http://www.swaton.ukfsn.org/bin/2to3.tar.gz | tar zxf -
   cd examples/python
   cp fpgalink2.py fpgalink3.py
   ../../2to3/2to3 fpgalink3.py | patch fpgalink3.py

 * Set your path's correctly.

   export LD_LIBRARY_PATH=$(pwd)/libfpgalink/lin.x64/rel:$LD_LIBRARY_PATH
   export PYTHON_PATH=$(pwd)/libfpgalink/examples/python:$PYTHON_PATH
2015-07-02 16:44:39 +02:00
Tim 'mithro' Ansell 055f7d51fc mibuild/xilinx: Adding programming with the Digilent Adept tools 2015-07-02 16:03:44 +02:00
Florent Kermarrec 7afa3d61d9 mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation
Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)
2015-07-02 09:42:12 +02:00
Yann Sionneau 4509265c70 travis: use use-local for conda install
http://conda.pydata.org/docs/build_tutorials/pkgs.html
2015-06-30 00:42:56 +02:00
Sebastien Bourdeauducq 31a447154d soc: support constants without value 2015-06-28 21:35:37 +02:00
William D. Jones 445f0f5d40 Remove self.programmer references in Mercury, as mercury programmer is not implemented. 2015-06-28 18:06:50 +02:00
William D. Jones 3ea7ef81a9 Add Mercury dev board to mibuild (http://www.micro-nova.com/mercury/) 2015-06-28 16:30:41 +02:00
Sebastien Bourdeauducq e913fca8a0 libcompiler-rt: add fixdfdi 2015-06-27 23:51:09 +02:00
Joe Britton a1e3fb16ac flterm.py: use serial_for_url 2015-06-26 11:40:33 +02:00
Florent Kermarrec 04c64eb1d8 litesata/example_designs: fix core generation (RAID introduced some changes on the PHY) 2015-06-26 00:20:58 +02:00
enjoy-digital c615b50735 Merge pull request #14 from olofk/misc_fixes
Misc fixes
2015-06-25 23:59:42 +02:00
Olof Kindgren 52e6bf6987 litesata/test: Add missing dependency on scrambler in bist_tb 2015-06-26 01:20:25 +02:00
Olof Kindgren ffb6081720 litesata/example_designs: Add missing clock in phy instantiation 2015-06-26 01:20:25 +02:00
Sébastien Bourdeauducq f03c2325d9 Merge pull request #21 from psmears/patch-1
Minor improvements to wording
2015-06-24 10:46:58 +00:00
Florent Kermarrec 125432b5b6 liteeth/example_designs: use new Keep SynthesisDirective 2015-06-23 16:15:28 +02:00
Florent Kermarrec d77a5fc5ac fhdl/specials: add Keep SynthesisDirective 2015-06-23 16:14:42 +02:00
Florent Kermarrec 351e654e9d software/bios/sdram: flush dcache and l2 in memtest (otherwise we are partially testing the cache) 2015-06-23 09:01:34 +02:00
Robert Jordens 2150e6cfef pipistrello: run at 83+1/3 MHz, cleanup CRG 2015-06-22 18:56:57 -06:00
Florent Kermarrec 01c5051866 liteeth/software: fix wishbone bridge 2015-06-23 01:48:45 +02:00
Florent Kermarrec 369cf4c4d7 liteeth/example_designs: add false path between clock domains (speed up implementation) and use automatic PHY detection 2015-06-23 01:08:49 +02:00
Florent Kermarrec 5c939b85ef liteeth/core/arp: fix table timer (wait_timer adaptation issue) 2015-06-23 00:25:26 +02:00
Florent Kermarrec a3c0e5c4d9 liteeth/core/arp: fix missing MAC address in ARP reply 2015-06-22 23:15:00 +02:00
Florent Kermarrec 781869d6f9 software/libbase/system: fix flush_l2_cache 2015-06-19 09:00:14 +02:00
Florent Kermarrec f44956bfca soc/sdram: add L2_SIZE constant and avoid declaring an empty flush_l2_cache function when L2_SIZE is not defined 2015-06-19 08:39:37 +02:00
Florent Kermarrec 71627cf9f0 bus/wishbone: remove size CSR from Cache (L2 size will be reported to the software as a constant) 2015-06-19 08:37:16 +02:00
Florent Kermarrec 7d8f4d1009 mibuild/xilinx/ise: fix source and set source to False by default on Windows (tools supposed to be in the PATH) 2015-06-19 00:52:39 +02:00
Florent Kermarrec 743a5f6ea9 mibuild/xilinx/ise: simplify default_ise_path 2015-06-19 00:40:05 +02:00
William D. Jones 6370acd968 Xilinx Platforms now use cmd.exe on Windows instead of bash to run scripts
(remove MSYS dependency)
2015-06-19 00:30:22 +02:00
psmears d435f30fa3 Minor improvements to wording 2015-06-18 12:26:22 +01:00
Sebastien Bourdeauducq 7c2d0fa641 indentation 2015-06-17 08:32:17 -06:00