Florent Kermarrec
|
9fcea6e64a
|
migen/sim/generic: use kwargs to pass parameters to icarus.Runner
|
2014-07-24 10:17:54 -06:00 |
Robert Jordens
|
10d639d313
|
flow.plumbing: spelling
|
2014-07-19 14:29:51 -06:00 |
Robert Jordens
|
9266e10cae
|
flow.plumbing: make argument order consistent
|
2014-07-19 14:29:50 -06:00 |
Sebastien Bourdeauducq
|
ff1d105c7e
|
genlib/SyncFIFO: remove flush signal (use InsertReset instead)
|
2014-07-17 19:15:45 -06:00 |
Fabien Marteau
|
a53feba8a1
|
mibuild/platforms: add APF27 and APF51 Armadeus platforms
|
2014-07-11 11:07:54 -06:00 |
Fabien Marteau
|
f45897c97f
|
mibuild/generic_platform.py: adding ability to use void pins (none fpga pin) for connectors
Signed-off-by: Fabien Marteau <fabien.marteau@armadeus.com>
|
2014-07-09 10:41:51 +02:00 |
Sebastien Bourdeauducq
|
8349543732
|
style
|
2014-07-05 18:56:20 +02:00 |
Sebastien Bourdeauducq
|
2bb821c571
|
crt-or1k: trim useless exception vectors
|
2014-07-05 18:53:23 +02:00 |
Sebastien Bourdeauducq
|
9a64309fcd
|
Merge branch 'master' of github.com:m-labs/misoc
|
2014-07-04 10:29:53 +02:00 |
Sebastien Bourdeauducq
|
6462ee7fe1
|
Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable.
|
2014-07-04 10:29:42 +02:00 |
Florent Kermarrec
|
d4833cb3dc
|
cpuif: remove limitations on csr data_width
|
2014-06-28 17:39:55 +02:00 |
Sebastien Bourdeauducq
|
506ac0f780
|
Merge branch 'master' of github.com:m-labs/migen
|
2014-06-28 16:15:20 +02:00 |
Florent Kermarrec
|
f6dfabf7a9
|
mibuild/xilinx_vivado.py: add set property to misc constraint
|
2014-06-28 16:15:07 +02:00 |
Florent Kermarrec
|
a0df5baa55
|
host: add support for various csr_data width (8 & 32 tested, but should work with others)
|
2014-06-26 13:22:21 +02:00 |
Sebastien Bourdeauducq
|
af9f76f73a
|
Merge branch 'master' of github.com:m-labs/migen
|
2014-06-22 15:34:02 +02:00 |
Florent Kermarrec
|
ea0f4706f5
|
fsm: set reset_state as default state
|
2014-06-22 15:21:22 +02:00 |
Florent Kermarrec
|
0f9bc5ad6e
|
fix bit inversion on CSV/PY exports
|
2014-06-21 19:06:47 +02:00 |
Florent Kermarrec
|
7ad1028f8b
|
mibuild: use SimpleCRG instead of CRG_SE, remove period parameter for CRG_DS, clean up platforms
|
2014-06-20 17:29:29 +02:00 |
Florent Kermarrec
|
074a12b444
|
create dump class and specific export functions, add python dictionnary export
|
2014-06-19 13:24:47 +02:00 |
Florent Kermarrec
|
a737358919
|
host: split read/export and add csv export
|
2014-06-17 11:25:10 +02:00 |
Florent Kermarrec
|
4c426b36f3
|
fifo: add support for depth=2
|
2014-06-15 23:58:46 +02:00 |
Florent Kermarrec
|
70a2ee4368
|
migen/bank/description: add reset parameter to CSRStatus
|
2014-06-15 23:54:38 +02:00 |
Sebastien Bourdeauducq
|
e5ca0c5ed5
|
make.py: add platform-option
|
2014-06-07 13:43:23 +02:00 |
Sebastien Bourdeauducq
|
26717a49fe
|
kc705: use string default arg
|
2014-06-07 13:41:46 +02:00 |
Florent Kermarrec
|
be0d86f57f
|
initial Vivado support
|
2014-06-07 12:24:28 +02:00 |
Florent Kermarrec
|
8719206a3a
|
uart2wishbone: add default baudrate
|
2014-06-05 15:13:20 +02:00 |
Sebastien Bourdeauducq
|
4c2a2090b1
|
libbase: remove crt during make clean
|
2014-06-01 23:17:43 +02:00 |
Sebastien Bourdeauducq
|
ac97815619
|
targets/simple: pass kwargs
|
2014-05-24 11:29:03 +02:00 |
Sebastien Bourdeauducq
|
b26ac465bd
|
crt0: remove macadress for or1k as well
|
2014-05-24 10:43:50 +02:00 |
Robert Jordens
|
6deeca064f
|
bios/crt0.S: remove unused macaddr, add syscall handler stub
|
2014-05-24 10:41:54 +02:00 |
Robert Jordens
|
81ed92d3b9
|
spiflash: redundant slice
|
2014-05-24 10:39:07 +02:00 |
Robert Jordens
|
d3b96a0a33
|
programmer: make xc3sprog verbose
|
2014-05-24 10:39:02 +02:00 |
Robert Jordens
|
ed902bfcdf
|
crt: add umoddi3
|
2014-05-24 10:38:55 +02:00 |
Florent Kermarrec
|
b94cba2d4b
|
mila: add input pipe to ease timing
|
2014-05-24 09:23:16 +02:00 |
Sebastien Bourdeauducq
|
dc2024f54d
|
bios: remove references to 'DDR' SDRAM, as we also support SDR SDRAM
|
2014-05-23 21:31:26 +02:00 |
Sebastien Bourdeauducq
|
e9b49ebb44
|
Use SDRAM on the Papilio Pro
Based on code by Robert Jordens
|
2014-05-23 21:26:09 +02:00 |
Florent Kermarrec
|
31e142fd88
|
drivers: clean up / fixes
|
2014-05-22 18:33:28 +02:00 |
Florent Kermarrec
|
9a059336bf
|
storage: simplify run length encoder...
|
2014-05-22 18:13:27 +02:00 |
Florent Kermarrec
|
0bc1cd6f77
|
fix uart selection when opening wishbone
|
2014-05-22 16:11:32 +02:00 |
Florent Kermarrec
|
1dcbb077fd
|
make.py: init bios memory in build-bitstream action otherwise it is not possible to run clean or build-csr-csv or build-headers without build-bios
|
2014-05-21 21:16:06 +02:00 |
Florent Kermarrec
|
f4c0648289
|
gensdrphy: fix dm generation
|
2014-05-21 21:16:06 +02:00 |
Florent Kermarrec
|
518a6822d9
|
mibuild/platforms: use add_period_constraint
|
2014-05-21 21:02:06 +02:00 |
Florent Kermarrec
|
a1a57fd962
|
mibuild: expose add_period_constraint (easier to use for simple designs than vendor specific code)
|
2014-05-21 21:02:06 +02:00 |
Florent Kermarrec
|
6c78e6f729
|
mibuild/altera_quartus: use default gui command line parameters (enable pll constraints propagation) and remove deprecated methods
|
2014-05-21 21:02:06 +02:00 |
Florent Kermarrec
|
1a07116ab1
|
change export format and simplify usage
|
2014-05-20 13:16:24 +02:00 |
Florent Kermarrec
|
ba0382ad92
|
move some functions in drivers and export layout in csv
|
2014-05-20 11:36:10 +02:00 |
Florent Kermarrec
|
2312127c1f
|
simplify and clean up
|
2014-05-20 09:56:35 +02:00 |
Florent Kermarrec
|
54339a6d5b
|
gensdrphy: fix memtype and change phase shift in comments.
|
2014-05-16 16:52:24 +02:00 |
Sebastien Bourdeauducq
|
6298624f98
|
sdramphy: remove fixed parameters
|
2014-05-14 16:08:40 +02:00 |
Sebastien Bourdeauducq
|
398608e997
|
bios: fill delay slot in boot_helper
|
2014-05-14 16:08:25 +02:00 |