b4267a7901
build/xilinx: source settings64.sh automatically just before build if LITEX_ENV_ISE/LITEX_ENV_VIVADO environment variables are set.
2020-05-19 16:21:52 +02:00
de7e0ee9ff
integration/soc_core: avoid cpu_variant check if custom cpu_cls is passed.
2020-05-19 16:01:57 +02:00
6f8f0d2346
litex_setup: add litehyperbus and remove hyperbus core/test.
2020-05-19 15:49:25 +02:00
109fd2674a
integration/builder: simplify default output_dir to "build/platform".
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All SoC are now based on the same base class and naming was too complicated.
2020-05-19 13:59:56 +02:00
55c0ddab36
litex_setup: add sha1 support on git clone/pull and fix microwatt to a specific sha1.
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The pythondata are generated automatically from external sources, some of them are
stable, some others still under development, so allow specifying a specific sha1
commit for sources that are moving and breaking LiteX support.
2020-05-19 13:27:12 +02:00
23d43a2c23
Merge pull request #530 from enjoy-digital/bios-libs
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BIOS: move cores' specific code to libs and cleanup.
2020-05-19 08:18:44 +02:00
7192397ab4
software/libbase: remove linker-sdram (unused).
2020-05-18 23:35:48 +02:00
b4b84def3c
software/bios: mode spisdcard code to liblitesdcard.
2020-05-18 23:33:34 +02:00
21e2a34c3f
software/bios: rename commands to cmds and update with libs' names.
2020-05-18 23:26:51 +02:00
33f6ce7431
software/bios: move hw flags definitions to respective libs, remove hw/flags.h.
2020-05-18 23:09:31 +02:00
403355a8ed
software: create liblitescard and move sdcard init/test code to it.
2020-05-18 22:49:12 +02:00
920d0ee536
software: create liblitedram and move sdram init/test code to it.
2020-05-18 22:42:23 +02:00
c95084e5c6
bios/software: rename cmd_dram/cmd_sdcard/cmd_spi_flash to cmd_litedram/cmd_litesdcard/cmd_spiflash.
2020-05-18 22:24:24 +02:00
573a881529
software/bios/commands: rename cmd_mdio to cmd_liteeth.
2020-05-18 22:16:20 +02:00
ff8d9e61bf
software/bios: move mdio to libliteeth.
2020-05-18 21:09:41 +02:00
70a67ce7ed
software/bios: rename libnet to libliteeth and move all ethernet files to it.
2020-05-18 21:04:54 +02:00
56b8723b72
software/bios: rename cmd_mem_access to cmd_mem.
2020-05-18 19:59:28 +02:00
a02077d547
cpu/microwatt/add_sources: add use_ghdl_yosys_synth parameter to convert microwatt to verilog using GHDL-Yosys-plugin and use converted verilog for build.
2020-05-18 17:30:42 +02:00
b5352f403c
cpu/microwatt: update microwatt_wraper.vhdl
2020-05-18 16:38:08 +02:00
be25500e91
uptime: rework and integrate it in Timer to ease software support.
2020-05-17 11:05:14 +02:00
d6549ff8f1
bios: add uptime command and rewrite cmd_bios comments.
2020-05-16 10:02:31 +02:00
fc0e55be32
soc: improve uptime comments.
2020-05-16 10:01:39 +02:00
840679add6
Merge pull request #526 from rprinz08/master
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Make booting from SD-Card to behave same as from SPI flash
2020-05-15 16:03:37 +02:00
82364de57f
soc/SoCController: add uptime since start (disabled by default) and allow features to be enabled/disabled.
2020-05-15 15:00:04 +02:00
3f649077b1
Make booting from SD-Card to behave same as from SPI flash
2020-05-15 12:07:52 +02:00
3391398a5f
bios/sdram: always show bitslip on two digits to keep scan aligned.
2020-05-14 15:20:52 +02:00
4a5072a014
Merge pull request #517 from ozbenh/csr-access-rework
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csr: Rework accessors
2020-05-14 15:04:52 +02:00
1e35b0e705
csr: Rework accessors
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Have all the new compound accessors be written in terms of the simple
ones and fix how CSR_ACCCESORS_DEFINED can be used to override the
simple ones but keep the definitions of the other ones around.
This *should* also also fix incorrect multiple accesses done
by 64-bit CPUs to 32-bit CSR busses, and make the accessors not
depend on CONFIG_CSR_ALIGNMENT being the same as sizeof(unsigned long)*8
In addition, the generated csr.h now will include system.h
always when with_access_functions is True. This guarantees that the
higher level accessors are defined. The extern prototypes for the
simple accessors when CSR_ACCCESORS_DEFINED are removed and system.h
is responsible for providing them. It is also added to hw/common.h
This allows system.h to set CSR_ACCCESORS_DEFINED when necessary, in
which case it's responsible for both declaring and defining the simple
accessors. That way, it can make them inline rather than forcing them
to be extern which at least on microwatt saves spaces.
One can continue to use -DCSR_ACCCESORS_DEFINED but in that case a system.h
will have to be provided with at least the extern definitions.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-05-14 21:38:19 +10:00
d4f44597de
CHANGES: update.
2020-05-14 09:34:37 +02:00
a51c7a7bac
Merge pull request #518 from enjoy-digital/csr_base
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export: add define of CSR_BASE if not already defined and use it for …
2020-05-14 08:02:37 +02:00
177c1e5397
Merge pull request #523 from DurandA/patch-5
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Update litex_term help
2020-05-14 07:17:46 +02:00
9d9e7d54cd
Update litex_term help
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Specify the use of kernel address with flash flag.
2020-05-13 22:50:09 +02:00
2e59dc329d
platforms/nexys4ddr: add card detect pin to sdcard.
2020-05-13 19:11:46 +02:00
51742be2bb
integration/soc: review/simplify interconnect and add logger.info.
2020-05-13 18:29:12 +02:00
78413cc09e
Merge pull request #519 from ozbenh/point2point
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soc: Revive generation of a PointToPoint interconnect
2020-05-13 16:48:21 +02:00
1ed6869110
soc: Revive generation of a PointToPoint interconnect
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When there's only one master, one slave, and that slave is at 0
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-05-14 00:06:53 +10:00
748ef1add3
export: add define of CSR_BASE if not already defined and use it for CSRs definitions/accesses.
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This will allow more flexibility when integrating standalone cores.
2020-05-13 15:56:20 +02:00
9f941138d2
test/test_targets: workaround to fix travis.
2020-05-13 11:04:40 +02:00
9d1443c1a8
cpu/soc_core: automatically set csr mapping to 0x00000000 when using CPUNone, remove csr_base parameter that was used for that.
2020-05-13 09:31:20 +02:00
5ea3bae036
bios/boot: review/fix #503 .
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- copy_image_from_flash_to_ram is now used by all CPUs.
- copy_image_from_flash_to_ram already show the flash address, no need to duplicate it.
2020-05-13 08:44:17 +02:00
bf7857f553
Merge pull request #503 from rprinz08/master
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BIOS boot firmware from SPI with address offset
2020-05-13 08:36:43 +02:00
b4e349eb49
Merge pull request #513 from mubes/bios_linker
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Bios linker edits to prevent inappropriate optimisation
2020-05-13 07:52:37 +02:00
d2d82dacf2
Bios linker edits to prevent inappropriate optimisation
2020-05-12 23:32:49 +01:00
1f55fcf449
fixed bug in BIOS spi flash "fw" command
2020-05-12 16:58:42 +02:00
f062c0c44b
removed FLASH_BOOT_OFFSET, replaced memcyp with copy_image_from_flash_to_ram
2020-05-12 16:57:21 +02:00
3fb99b7d33
cores/spi_flash: add back old SpiFlashDualQuad and rename new one as SpiFlashQuadReadWrite.
2020-05-12 16:51:47 +02:00
2a5a7536b8
Merge pull request #478 from antmicro/extended_spi_flash
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Extended SPI flash support
2020-05-12 16:42:01 +02:00
7d79da8eda
Merge pull request #510 from mubes/colorlight_usb
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Colorlight usb
2020-05-12 16:35:29 +02:00
3a6dd95d6f
integration/soc: review/simplify changes for standalone cores.
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- do the CSR alignment update only if CPU is not CPUNone.
- revert PointToPoint interconnect when 1 master and 1 slave since this will
break others use cases and will prevent mapping slave to a specific location.
It's probably better to let the synthesis tools optimize the 1:1 mapping directly.
- add with_soc_interconnect parameter to add_sdram that defaults to True. When
set to False, only the LiteDRAMCore will be instantiated and interconnect with
the SoC will not be added.
2020-05-12 16:18:26 +02:00
8499733289
Fix dumb missing line
2020-05-12 14:40:11 +01:00
Florent Kermarrec
rprinz08
Benjamin Herrenschmidt
Arnaud Durand
Dave Marples